2008 |
17 | | Jan Kelbel,
Zdenek Hanzálek:
Feeder Setup Optimization in SMT Assembly.
FLAIRS Conference 2008: 575-576 |
16 | EE | Jan Krakora,
Zdenek Hanzálek:
FPGA based tester tool for hybrid real-time systems.
Microprocessors and Microsystems - Embedded Hardware Design 32(8): 447-459 (2008) |
15 | EE | Libor Waszniowski,
Zdenek Hanzálek:
Formal verification of multitasking applications based on timed automata model.
Real-Time Systems 38(1): 39-65 (2008) |
2007 |
14 | EE | Roman Bartosinski,
Zdenek Hanzálek,
Petr Struzka,
Libor Waszniowski:
Integrated Environment for Embedded Control Systems Design.
IPDPS 2007: 1-8 |
13 | EE | Petr Jurcík,
Anis Koubaa,
Mário Alves,
Eduardo Tovar,
Zdenek Hanzálek:
A Simulation Model for the IEEE 802.15.4 protocol: Delay/Throughput Evaluation of the GTS Mechanism.
MASCOTS 2007: 109-116 |
12 | EE | Premysl Sucha,
Zdenek Hanzálek,
Antonin Hermanek,
Jan Schier:
Scheduling of Iterative Algorithms with Matrix Operations for Efficient FPGA Design - Implementation of Finite Interval Constant Modulus Algorithm.
VLSI Signal Processing 46(1): 35-53 (2007) |
2006 |
11 | EE | Ondrej Spinka,
Jan Krakora,
Michal Sojka,
Zdenek Hanzálek:
Los-Cost Avionics System for Ultra-Light Aircrafts.
ETFA 2006: 102-109 |
10 | EE | Roman Bartosinski,
Zdenek Hanzálek,
Libor Waszniowski,
Petr Struzka:
Processor Expert Enhances Matlab Simulink Facilities for Embedded Software Rapid Development.
ETFA 2006: 625-628 |
9 | EE | Premysl Sucha,
Zdenek Hanzálek:
Scheduling of Tasks with Precedence Delays and Relative Deadlines - Framework for Time-optimal Dynamic Reconfiguration of FPGAs.
IPDPS 2006: 1-8 |
8 | EE | Premysl Sucha,
Zdenek Hanzálek:
Scheduling of tasks with precedence delays and relative deadlines framework for time-optimal dynamic reconfiguration of FPGAs.
IPDPS 2006 |
2005 |
7 | | Zdenek Pohl,
Premysl Sucha,
Jiri Kadlec,
Zdenek Hanzálek:
Performance Tuning of Iterative Algorithms in Signal Processing.
FPL 2005: 699-702 |
2004 |
6 | EE | Premysl Sucha,
Zdenek Pohl,
Zdenek Hanzálek:
Scheduling of Iterative Algorithms on FPGA with Pipelined Arithmetic Unit.
IEEE Real-Time and Embedded Technology and Applications Symposium 2004: 404-412 |
5 | EE | Martina Svadova,
Zdenek Hanzálek:
An algorithm for the evolution graph of extended hybrid Petri nets.
SMC (5) 2004: 4905-4910 |
2003 |
4 | EE | Libor Waszniowski,
Zdenek Hanzálek:
Analysis of Real Time Operating System Based Applications.
FORMATS 2003: 219-233 |
2002 |
3 | | Ondrej Dolejs,
Zdenek Hanzálek:
Optimality of the Tree Building Control Protocol.
PDPTA 2002: 1685-1691 |
1998 |
2 | | Zdenek Hanzálek:
A Parallel Algorithm for Gradient Training of Feedforward Neural Networks.
Parallel Computing 24(5-6): 823-839 (1998) |
1994 |
1 | | Zdenek Hanzálek:
Simulating Neural Networks on Telmat T-node.
HPCN 1994: 416-417 |