| 2007 |
|---|
| 6 | EE | Subhomoy Chattopadhyay,
Rakesh Patel:
Tutorial T3: Low Power Design Techniques for Nanometer Design Processes - 65nm and Smaller.
VLSI Design 2007: 5 |
| 2004 |
|---|
| 5 | EE | Lawrence T. Clark,
Rakesh Patel,
Timothy S. Beatty:
Managing standby and active mode leakage power in deep sub-micron design.
ISLPED 2004: 274-279 |
| 2003 |
|---|
| 4 | EE | Fei Li,
Lei He,
Joseph M. Basile,
Rakesh Patel,
Hema Ramamurthy:
High Level Area and Current Estimation.
PATMOS 2003: 259-268 |
| 2002 |
|---|
| 3 | EE | Michael Hutton,
Vinson Chan,
Peter Kazarian,
Victor Maruri,
Tony Ngai,
Jim Park,
Rakesh Patel,
Bruce Pedersen,
Jay Schleicher,
Sergey Shumarayev:
Interconnect enhancements for a high-speed PLD architecture.
FPGA 2002: 3-10 |
| 2001 |
|---|
| 2 | EE | John C. Grundy,
Rakesh Patel:
Developing Software Components with the UML, Enterprise Java Beans and Aspects.
Australian Software Engineering Conference 2001: 127-136 |
| 1998 |
|---|
| 1 | EE | Vivek Tiwari,
Deo Singh,
Suresh Rajgopal,
Gaurav Mehta,
Rakesh Patel,
Franklin Baez:
Reducing Power in High-Performance Microprocessors.
DAC 1998: 732-737 |
