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Subhomoy Chattopadhyay

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2007
2EESubhomoy Chattopadhyay: Low power design techniques for nanometer design processes: 65 nm and smaller. SBCCI 2007: 5
1EESubhomoy Chattopadhyay, Rakesh Patel: Tutorial T3: Low Power Design Techniques for Nanometer Design Processes - 65nm and Smaller. VLSI Design 2007: 5

Coauthor Index

1Rakesh Patel [1]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)