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2002 | ||
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1 | EE | Michael Hutton, Vinson Chan, Peter Kazarian, Victor Maruri, Tony Ngai, Jim Park, Rakesh Patel, Bruce Pedersen, Jay Schleicher, Sergey Shumarayev: Interconnect enhancements for a high-speed PLD architecture. FPGA 2002: 3-10 |
1 | Vinson Chan | [1] |
2 | Michael Hutton (Michael D. Hutton, Mike Hutton) | [1] |
3 | Peter Kazarian | [1] |
4 | Victor Maruri | [1] |
5 | Tony Ngai | [1] |
6 | Jim Park | [1] |
7 | Rakesh Patel | [1] |
8 | Bruce Pedersen | [1] |
9 | Jay Schleicher | [1] |