| 1995 |
|---|
| 4 | EE | Sandeep Pagey:
Fast functional testing of delay-insensitive circuits.
Asian Test Symposium 1995: 375-381 |
| 3 | EE | Sandeep Pagey,
Ajay Khoche,
Erik Brunvand:
DFT for fast testing of self-timed control circuits.
Asian Test Symposium 1995: 382-386 |
| 2 | EE | B. Ravi Kishore,
Rubin A. Parekhji,
Sandeep Pagey,
Sunil D. Sherlekar,
G. Venkatesh:
A new methodology for the design of low-cost fail safe circuits and networks.
VLSI Design 1995: 355-358 |
| 1991 |
|---|
| 1 | EE | Sandeep Pagey,
Sunil D. Sherlekar,
G. Venkatesh:
A methodology for the design of SFS/SCD circuits for a class of unordered codes.
J. Electronic Testing 2(3): 261-277 (1991) |
