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1995 | ||
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4 | EE | Sandeep Pagey: Fast functional testing of delay-insensitive circuits. Asian Test Symposium 1995: 375-381 |
3 | EE | Sandeep Pagey, Ajay Khoche, Erik Brunvand: DFT for fast testing of self-timed control circuits. Asian Test Symposium 1995: 382-386 |
2 | EE | B. Ravi Kishore, Rubin A. Parekhji, Sandeep Pagey, Sunil D. Sherlekar, G. Venkatesh: A new methodology for the design of low-cost fail safe circuits and networks. VLSI Design 1995: 355-358 |
1991 | ||
1 | EE | Sandeep Pagey, Sunil D. Sherlekar, G. Venkatesh: A methodology for the design of SFS/SCD circuits for a class of unordered codes. J. Electronic Testing 2(3): 261-277 (1991) |
1 | Erik Brunvand | [3] |
2 | Ajay Khoche | [3] |
3 | B. Ravi Kishore | [2] |
4 | Rubin A. Parekhji | [2] |
5 | Sunil D. Sherlekar | [1] [2] |
6 | G. Venkatesh | [1] [2] |