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Toshinobu Ono

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2001
4EEToshinobu Ono, Akira Kozawa, Takashi Kimura, Yoshihiro Konno, Koji Saga: An Application of Partial Scan Techniques to a High-End System LSI Design. Asian Test Symposium 2001: 459
1997
3EEToshinobu Ono, Kazuo Wakui, Hitoshi Hikima, Yoshiyuki Nakamura, Masaaki Yoshida: Integrated and Automated Design-for-Testability Implementation for Cell-Based ICs. Asian Test Symposium 1997: 122-125
1994
2EEToshinobu Ono: Selecting partial scan flip-flops for circuit partitioning. ICCAD 1994: 646-650
1991
1 Toshinobu Ono, Masaaki Yoshida: A Test Generation Method for Sequential Circuits Based on Maximum Utilization of Internal States. ITC 1991: 75-82

Coauthor Index

1Hitoshi Hikima [3]
2Takashi Kimura [4]
3Yoshihiro Konno [4]
4Akira Kozawa [4]
5Yoshiyuki Nakamura [3]
6Koji Saga [4]
7Kazuo Wakui [3]
8Masaaki Yoshida [1] [3]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)