| 2007 |
|---|
| 8 | EE | Yannick Monnet,
Marc Renaudin,
Régis Leveugle:
Formal Analysis of Quasi Delay Insensitive Circuits Behavior in the Presence of SEUs.
IOLTS 2007: 113-120 |
| 2006 |
|---|
| 7 | EE | Yannick Monnet,
Marc Renaudin,
Régis Leveugle,
Christophe Clavier,
Pascal Moitrel:
Case Study of a Fault Attack on Asynchronous DES Crypto-Processors.
FDTC 2006: 88-97 |
| 6 | EE | Yannick Monnet,
Marc Renaudin,
Régis Leveugle,
Nathalie Feyt,
Pascal Moitrel,
F. M'Buwa Nzenguet:
Practical Evaluation of Fault Countermeasures on an Asynchronous DES Crypto Processor.
IOLTS 2006: 125-130 |
| 5 | EE | Marc Renaudin,
Yannick Monnet:
Asynchronous Design: Fault Robustness and Security Characteristics.
IOLTS 2006: 92-95 |
| 4 | EE | Yannick Monnet,
Marc Renaudin,
Régis Leveugle:
Designing Resistant Circuits against Malicious Faults Injection Using Asynchronous Logic.
IEEE Trans. Computers 55(9): 1104-1115 (2006) |
| 2005 |
|---|
| 3 | EE | Yannick Monnet,
Marc Renaudin,
Régis Leveugle:
Asynchronous circuits transient faults sensitivity evaluation.
DAC 2005: 863-868 |
| 2 | EE | Yannick Monnet,
Marc Renaudin,
Régis Leveugle:
Hardening Techniques against Transient Faults for Asynchronous Circuits.
IOLTS 2005: 129-134 |
| 2004 |
|---|
| 1 | EE | Yannick Monnet,
Marc Renaudin,
Régis Leveugle:
Asynchronous Circuits Sensitivity to Fault Injection.
IOLTS 2004: 121-128 |
