| 2003 |
|---|
| 4 | EE | D. Vinay Kumar,
Nihar R. Mohapatra,
Mahesh B. Patil,
V. Ramgopal Rao:
Application of Look-up Table Approach to High-K Gate Dielectric MOS Transistor circuits.
VLSI Design 2003: 128- |
| 3 | EE | Nihar R. Mohapatra,
Madhav P. Desai,
V. Ramgopal Rao:
Detailed Analysis of FIBL in MOS Transistors with High-K Gate Dielectrics.
VLSI Design 2003: 99-104 |
| 2001 |
|---|
| 2 | EE | Nihar R. Mohapatra,
A. Dutta,
Madhav P. Desai,
V. Ramgopal Rao:
Effect Of Fringing Capacitances In Sub 100 Nm Mosfet's With High-K Gate Dielectrics.
VLSI Design 2001: 479- |
| 1 | EE | Nihar R. Mohapatra,
A. Dutta,
G. Sridhar,
Madhav P. Desai,
V. Ramgopal Rao:
Sub-100 nm CMOS circuit performance with high-K gate dielectrics.
Microelectronics Reliability 41(7): 1045-1048 (2001) |
