2008 | ||
---|---|---|
52 | EE | Stephen S. Yau, João W. Cangussu, Aditya P. Mathur, Fevzi Belli, Kai-Yuan Cai: Message from the IWSC 2008 Workshop Organizers. COMPSAC 2008: 813 |
51 | EE | Stephen S. Yau, João W. Cangussu, Aditya P. Mathur, Fevzi Belli, Kai-Yuan Cai: IWSC 2008 Workshop Organization. COMPSAC 2008: 814-815 |
50 | EE | Scott D. Miller, Raymond A. DeCarlo, Aditya P. Mathur: Quantitative Modeling for Incremental Software Process Control. COMPSAC 2008: 830-835 |
49 | EE | K. R. Jayaram, Aditya P. Mathur: On the Adequacy of Statecharts as a Source of Tests for Cryptographic Protocols. COMPSAC 2008: 937-942 |
48 | EE | João W. Cangussu, Kai-Yuan Cai, Scott D. Miller, Aditya P. Mathur: Software Cybernetics. Wiley Encyclopedia of Computer Science and Engineering 2008 |
2006 | ||
47 | EE | Fevzi Belli, Kai-Yuan Cai, Raymond A. DeCarlo, Aditya P. Mathur: Introduction to the special section on software cybernetics. Journal of Systems and Software 79(11): 1483-1485 (2006) |
46 | EE | Scott D. Miller, Raymond A. DeCarlo, Aditya P. Mathur, João W. Cangussu: A control-theoretic approach to the management of the software system test phase. Journal of Systems and Software 79(11): 1486-1503 (2006) |
2005 | ||
45 | EE | Aditya P. Mathur: Model-Based Software Testing and Verification. COMPSAC (1) 2005: 329 |
44 | EE | Scott D. Miller, Aditya P. Mathur, Raymond A. DeCarlo: DIG: A Tool for Software Process Data Extraction and Grooming. COMPSAC (1) 2005: 35-40 |
43 | EE | Scott D. Miller, Raymond A. DeCarlo, Aditya P. Mathur: A Software Cybernetic Approach to Control of the Software System Test Phase. COMPSAC (2) 2005: 103-108 |
42 | EE | Qianxiang Wang, Aditya P. Mathur: Interceptor Based Constraint Violation Detection. ECBS 2005: 457-464 |
2004 | ||
41 | EE | J. Jenny Li, Tangqiu Li, Zongkai Lin, Aditya P. Mathur, Karama Kanoun: Computer Supported Cooperative Work in Software Engineering. COMPSAC 2004: 328 |
40 | EE | Scott D. Miller, Raymond A. DeCarlo, Aditya P. Mathur: Modeling and Control of the Incremental Software Test Process. COMPSAC Workshops 2004: 156-159 |
39 | EE | João W. Cangussu, Richard M. Karcich, Aditya P. Mathur, Raymond A. DeCarlo: Software Release Control using Defect Based Quality Estimation. ISSRE 2004: 440-450 |
2003 | ||
38 | EE | João W. Cangussu, Raymond A. DeCarlo, Aditya P. Mathur: Monitoring the software test process using statistical process control: a logarithmic approach. ESEC / SIGSOFT FSE 2003: 158-167 |
37 | EE | Baskar Sridharan, Aditya P. Mathur, Kai-Yuan Cai: Synthesizing Distributed Controllers for the Safe Operation of ConnectedSpaces. PerCom 2003: 452-459 |
36 | EE | Baskar Sridharan, Aditya P. Mathur, Kai-Yuan Cai: Using Supervisory Control to Synthesize Safety Controllers for Connected Spaces. QSIC 2003: 186- |
35 | EE | Kai-Yuan Cai, João W. Cangussu, Raymond A. DeCarlo, Aditya P. Mathur: An Overview of Software Cybernetics. STEP 2003: 77-86 |
34 | EE | João W. Cangussu, Raymond A. DeCarlo, Aditya P. Mathur: Using Sensitivity Analysis to Validate a State Variable Model of the Software Test Process. IEEE Trans. Software Eng. 29(5): 430-443 (2003) |
2002 | ||
33 | EE | João W. Cangussu, Aditya P. Mathur, Raymond A. DeCarlo: Effect of Disturbances on the Convergence of Failure Intensity. ISSRE 2002: 377-387 |
32 | EE | João W. Cangussu, Raymond A. DeCarlo, Aditya P. Mathur: A Formal Model of the Software Test Process. IEEE Trans. Software Eng. 28(8): 782-796 (2002) |
2001 | ||
31 | EE | Katerina Goseva-Popstojanova, Aditya P. Mathur, Kishor S. Trivedi: Many architecture-based software reliability modelsComparison of Architecture-Based Software Reliability Models. ISSRE 2001: 22-33 |
30 | EE | João W. Cangussu, Aditya P. Mathur, Raymond A. DeCarlo: Feedback Control of the Software Test Process Through Measurements of Software Reliability. ISSRE 2001: 232-241 |
29 | Márcio Eduardo Delamaro, José Carlos Maldonado, Alberto Pasquini, Aditya P. Mathur: Interface Mutation Test Adequacy Criterion: An Empirical Evaluation. Empirical Software Engineering 6(2): 111-142 (2001) | |
28 | EE | Márcio Eduardo Delamaro, José Carlos Maldonado, Aditya P. Mathur: Interface Mutation: An Approach for Integration Testing. IEEE Trans. Software Eng. 27(3): 228-247 (2001) |
27 | Sudipto Ghosh, Aditya P. Mathur: Interface mutation. Softw. Test., Verif. Reliab. 11(3): 227-247 (2001) | |
2000 | ||
26 | EE | Neelam Gupta, Aditya P. Mathur, Mary Lou Soffa: Generating Test Data for Branch Coverage. ASE 2000: 219-228 |
25 | EE | Wenliang Du, Aditya P. Mathur: Testing for Software Vulnerability Using Environment Perturbation. DSN 2000: 603-612 |
24 | EE | Baskar Sridharan, Sambrama Mundkur, Aditya P. Mathur: Non-Intrusive Testing, Monitoring and Control of Distributed CORBA Objects. TOOLS (33) 2000: 195- |
23 | EE | Sudipto Ghosh, Aditya P. Mathur: Interface Mutation to Assess the Adequacy of Tests for Components and Systems. TOOLS (34) 2000: 37- |
1999 | ||
22 | EE | Wenliang Du, Praerit Garg, Aditya P. Mathur: Security Relevancy Analysis on the Registry of Windows NT 4.0. ACSAC 1999: 331-340 |
21 | EE | Neelam Gupta, Aditya P. Mathur, Mary Lou Soffa: UNA Based Iterative Test Data Generation and Its Evaluation. ASE 1999: 224- |
20 | EE | W. Eric Wong, Joseph Robert Horgan, Aditya P. Mathur, Alberto Pasquini: Test set size minimization and fault detection effectiveness: A case study in a space application. Journal of Systems and Software 48(2): 79-89 (1999) |
1998 | ||
19 | EE | Neelam Gupta, Aditya P. Mathur, Mary Lou Soffa: Automated Test Data Generation Using an Iterative Relaxation Method. SIGSOFT FSE 1998: 231-244 |
18 | W. Eric Wong, Joseph Robert Horgan, Saul London, Aditya P. Mathur: Effect of Test Set Minimization on Fault Detection Effectiveness. Softw., Pract. Exper. 28(4): 347-369 (1998) | |
1997 | ||
17 | EE | W. Eric Wong, Joseph Robert Horgan, Aditya P. Mathur, Alberto Pasquini: Test Set Size Minimization and Fault Detection Effectiveness: A Case Study in a Space Application. COMPSAC 1997: 522- |
1996 | ||
16 | EE | Saileshwar Krishnamurthy, Aditya P. Mathur: On predicting reliability of modules using code coverage. CASCON 1996: 22 |
1995 | ||
15 | EE | David B. Boardman, Geoffrey Greene, Vivek Khandelwal, Aditya P. Mathur: LISTEN: A Tool to Investigate the Use of Sound for the Analysis of Program Behavior. COMPSAC 1995: 184-191 |
14 | EE | W. Eric Wong, Joseph Robert Horgan, Saul London, Aditya P. Mathur: Effect of Test Set Minimization on Fault Detection Effectiveness. ICSE 1995: 41-50 |
13 | EE | Richard A. DeMillo, Aditya P. Mathur, W. Eric Wong: Some Critical Remarks on a Hierarchy of Fault-Detecting Abilities of Test Methods. IEEE Trans. Software Eng. 21(10): 858-861 (1995) |
12 | EE | W. Eric Wong, Aditya P. Mathur: Reducing the cost of mutation testing: An empirical study. Journal of Systems and Software 31(3): 185-196 (1995) |
1994 | ||
11 | EE | Aditya P. Mathur, W. Eric Wong: A Theoretical Comparison Between Mutation and Data Flow Based Test Adequacy Criteria. ACM Conference on Computer Science 1994: 38-45 |
10 | David B. Boardman, Aditya P. Mathur: A Two-Semester Undergraduate Sequence in Software Engineering: Architecutre & Experience. CSEE 1994: 5-22 | |
9 | W. Eric Wong, Aditya P. Mathur, José Carlos Maldonado: Mutation Versus All-uses: An Empirical Evaluation of Cost, Strength and Effectiveness. Software Quality and Productivity 1994: 258-265 | |
8 | EE | Ling-Yu Chuang, Vernon Rego, Aditya P. Mathur: Experiments with Program unification on the Cray Y-MP. Concurrency - Practice and Experience 6(1): 33-53 (1994) |
7 | Aditya P. Mathur, W. Eric Wong: An Empirical Comparison of Data Flow and Mutation-Based Test Adequacy Criteria. Softw. Test., Verif. Reliab. 4(1): 9-31 (1994) | |
1993 | ||
6 | EE | Byoungju Choi, Aditya P. Mathur: High-performance mutation testing. Journal of Systems and Software 20(2): 135-152 (1993) |
1992 | ||
5 | Joseph Robert Horgan, Aditya P. Mathur: Assessing Testing Tools in Research and Education. IEEE Software 9(3): 61-69 (1992) | |
1991 | ||
4 | EE | Edward W. Krauser, Aditya P. Mathur, Vernon Rego: High Performance Software Testing on SIMD Machines. IEEE Trans. Software Eng. 17(5): 403-423 (1991) |
1990 | ||
3 | EE | Vernon Rego, Aditya P. Mathur: Exploiting Parallelism Across Program Execution: A Unification Technique and Its Analysis. IEEE Trans. Parallel Distrib. Syst. 1(4): 399-414 (1990) |
2 | Vernon Rego, Aditya P. Mathur: Concurrency Enhancement through Program Unification: A Performance Analysis. J. Parallel Distrib. Comput. 8(3): 201-217 (1990) | |
1988 | ||
1 | Aditya P. Mathur, Edward W. Krauser: Modeling Mutation on a Vector Processor. ICSE 1988: 154-161 |