1989 | ||
---|---|---|
2 | Kazumi Hatayama, Mitsuji Ikeda, Terumine Hayashi, Masahiro Takakura, Kuniaki Kishida, Shun Ishiyama: Enhanced Delay Test Generator for High-Speed Logic LSIs. ITC 1989: 161-165 | |
1986 | ||
1 | EE | Kuniaki Kishida, F. Shirotori, Y. Ikemoto, Shun Ishiyama, Terumine Hayashi: A delay test system for high speed logic LSI's. DAC 1986: 786-790 |
1 | Kazumi Hatayama | [2] |
2 | Terumine Hayashi | [1] [2] |
3 | Mitsuji Ikeda | [2] |
4 | Y. Ikemoto | [1] |
5 | Shun Ishiyama | [1] [2] |
6 | F. Shirotori | [1] |
7 | Masahiro Takakura | [2] |