Y. Ikemoto

1986
1	EE	Kuniaki Kishida, F. Shirotori, Y. Ikemoto, Shun Ishiyama, Terumine Hayashi: A delay test system for high speed logic LSI's. DAC 1986: 786-790

Coauthor Index

1	Terumine Hayashi	[1]
2	Shun Ishiyama	[1]
3	Kuniaki Kishida	[1]
4	F. Shirotori	[1]