| |
| 1998 | ||
|---|---|---|
| 3 | Nguyen-Ngoc Bình, Masaharu Imai, Yoshinori Takeuchi: A Performance Maximization Algorithm to Design ASIPs under the Constraint of Chip Area Including RAM and ROM Sizes. ASP-DAC 1998: 367-372 | |
| 1996 | ||
| 2 | EE | Nguyen-Ngoc Bình, Masaharu Imai, Akichika Shiomi, Nobuyuki Hikichi: A Hardware/Software Partitioning Algorithm for Designing Pipelined ASIPs with Least Gate Counts. DAC 1996: 527-532 |
| 1995 | ||
| 1 | EE | Nguyen-Ngoc Bình, Masaharu Imai, Akichika Shiomi, Nobuyuki Hikichi: A hardware/software codesign method for pipelined instruction set processor using adaptive database. ASP-DAC 1995 |
| 1 | Nobuyuki Hikichi | [1] [2] |
| 2 | Masaharu Imai | [1] [2] [3] |
| 3 | Akichika Shiomi | [1] [2] |
| 4 | Yoshinori Takeuchi | [3] |