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Walter Huang

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2007
2EEErhan Ozalevli, Walter Huang, Paul E. Hasler, David V. Anderson: VLSI Implementation of a Reconfigurable Mixed-Signal Finite Impulse Response Filter. ISCAS 2007: 2168-2171
2004
1EEDaniel J. Allred, Walter Huang, Venkatesh Krishnan, Heejong Yoo, David V. Anderson: An FPGA Implementation for a High Throughput Adaptive Filter Using Distributed Arithmetic. FCCM 2004: 324-325

Coauthor Index

1Daniel J. Allred [1]
2David V. Anderson [1] [2]
3Paul E. Hasler [2]
4Venkatesh Krishnan [1]
5Erhan Ozalevli [2]
6Heejong Yoo [1]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)