| 2008 |
|---|
| 11 | EE | Arindam Basu,
Csaba Petre,
Paul E. Hasler:
Bifurcations in a silicon neuron.
ISCAS 2008: 428-431 |
| 2007 |
|---|
| 10 | EE | Paul E. Hasler,
Arindam Basu,
Sctt Kozil:
Above Threshold pFET InjectionModeling intended for ProgrammingFloating-Gate Systems.
ISCAS 2007: 1557-1560 |
| 9 | EE | Arindam Basu,
Kofi M. Odame,
Paul E. Hasler:
Dynamics of a Logarithmic Transimpedance Amplifier.
ISCAS 2007: 1673-1676 |
| 8 | EE | Arindam Basu,
Ryan W. Robucci,
Paul E. Hasler:
A Low-Power, Compact, Adaptive Logarithmic Transimpedance Amplifier Operating over Seven Decades of Current.
ISCAS 2007: 3055-3058 |
| 7 | EE | Paul E. Hasler,
Scott Kozoil,
Ethan Farquhar,
Arindam Basu:
Transistor Channel Dendrites implementing HMM classifiers.
ISCAS 2007: 3359-3362 |
| 6 | EE | Kofi M. Odame,
Christopher M. Twigg,
Arindam Basu,
Paul E. Hasler:
Studying Nonlinear Dynamical Systems on a Reconfigurable Analog Platform.
ISCAS 2007: 445-448 |
| 5 | EE | Arindam Basu,
Paul E. Hasler:
A Fully Integrated Architecture for Fast Programming of Floating Gates.
ISCAS 2007: 957-960 |
| 2005 |
|---|
| 4 | EE | Arindam Basu,
Anindya Sundar Dhar:
Design Issues in Switched Capacitor Ladder Filters.
VLSI Design 2005: 862-865 |
| 2004 |
|---|
| 3 | EE | Ravi Chawla,
Haw-Jing Lo,
Arindam Basu,
Paul E. Hasler,
Bradley A. Minch:
A fully programmable log-domain bandpass filter using multiple-input translinear elements.
ISCAS (1) 2004: 33-36 |
| 2 | | Arindam Basu,
Ashis Kumar Mal,
Anindya Sundar Dhar:
Digital controlled analog architecture for DCT and DST using capacitor switching.
ISCAS (2) 2004: 309-312 |
| 1 | | Ashis Kumar Mal,
Arindam Basu,
Anindya Sundar Dhar:
Sampled analog architecture for DCT and DST.
ISCAS (2) 2004: 825-828 |
