2008 |
28 | EE | He Gong Wei,
U. Fat Chio,
Sai-Weng Sin,
Seng-Pan U.,
Rui Paulo Martins:
A power scalable 6-bit 1.2GS/s flash ADC with power on/off Track-and-Hold and preamplifier.
ISCAS 2008: 5-8 |
27 | EE | Pui-In Mak,
Ka-Hou Ao Ieong,
Rui Paulo Martins:
An open-source-input, ultra-wideband LNA with mixed-voltage ESD protection for full-band (170-to-1700 MHz) mobile TV tuners.
ISCAS 2008: 668-671 |
2007 |
26 | EE | Weng-leng Mok,
Pui-In Mak,
Seng-Pan U.,
Rui Paulo Martins:
A Highly-Linear Successive-Approximation Front-End Digitizer with Built-in Sample-and-Hold Function for Pipeline/Two-Step ADC.
ISCAS 2007: 1947-1950 |
25 | EE | Phillip Ngai Cheong,
Rui Paulo Martins:
Interactive IIR SC Multirate Compiler Applied to Multistage decimator Design.
Journal of Circuits, Systems, and Computers 16(4): 517-525 (2007) |
2006 |
24 | EE | Ka-Hou Ao Ieong,
Seng-Pan U.,
Rui Paulo Martins:
A 1-V 2.5-mW Transient-Improved Current-Steering DAC using Charge-Removal-Replacement Technique.
APCCAS 2006: 183-186 |
23 | EE | Kin-Sang Chio,
Seng-Pan U.,
Rui Paulo Martins:
A dual-mode low-distortion sigma-delta modulator with relaxing comparator accuracy.
ISCAS 2006 |
22 | EE | Chon-In Lao,
Seng-Pan U.,
Rui Paulo Martins:
A novel effective bandpass semi-MASH sigma-delta modulator with double-sampling mismatch-free resonator.
ISCAS 2006 |
21 | EE | Sai-Weng Sin,
Seng-Pan U.,
Rui Paulo Martins:
A novel low-voltage finite-gain compensation technique for high-speed reset- and switched-opamp circuits.
ISCAS 2006 |
20 | EE | Jun-Xia Ma,
Sai-Weng Sin,
Seng-Pan U.,
Rui Paulo Martins:
A power-efficient 1.056 GS/s resolution-switchable 5-bit/6-bit flash ADC for UWB applications.
ISCAS 2006 |
19 | EE | Pui-In Mak,
Seng-Pan U.,
Rui Paulo Martins:
Design and test strategy underlying a low-voltage analog-baseband IC for 802.11a/b/g WLAN SiP receivers.
ISCAS 2006 |
2005 |
18 | EE | Ka-Hou Ao Ieong,
Chong-Yin Fok,
Pui-In Mak,
Seng-Pan U.,
Rui Paulo Martins:
A frequency up-conversion and two-step channel selection embedded CMOS D/A interface.
ISCAS (1) 2005: 392-395 |
17 | EE | Si-Weng Fok,
Phillip Ngai Cheong,
Kam-Weng Tam,
Rui Paulo Martins:
A novel microstrip bandpass filter design using asymmetric parallel coupled-line.
ISCAS (1) 2005: 404-407 |
16 | EE | Sai-Weng Sin,
Seng-Pan U.,
Rui Paulo Martins:
A novel very low-voltage SC-CMFB technique for fully-differential reset-opamp circuits.
ISCAS (2) 2005: 1581-1584 |
15 | EE | Sai-Weng Sin,
Seng-Pan U.,
Rui Paulo Martins:
A novel low-voltage cross-coupled passive sampling branch for reset- and switched-opamp circuits.
ISCAS (2) 2005: 1585-1588 |
14 | EE | Chon-In Lao,
Seng-Pan U.,
Rui Paulo Martins:
A novel semi-MASH sub-stage for high-order cascade sigma-delta modulators.
ISCAS (4) 2005: 3095-3098 |
13 | EE | Kin-Sang Chio,
Seng-Pan U.,
Rui Paulo Martins:
A robust 3rd order low-distortion multi-bit sigma-delta modulator with reduced number of op-amps for WCDMA.
ISCAS (4) 2005: 3099-3102 |
2004 |
12 | | Pui-In Mak,
Kin-Kwan Ma,
Weng-leng Mok,
Chi-sam Sou,
Kit-man Ho,
Cheng-Man Ng,
Seng-Pan U.,
Rui Paulo Martins:
An I/Q-multiplexed and OTA-shared CMOS pipelined ADC with an A-DQS S/H front-end for two-step-channel-select low-IF receiver.
ISCAS (1) 2004: 1068-1071 |
11 | | Sai-Weng Sin,
Seng-Pan U.,
Rui Paulo Martins:
A generalized timing-skew-free, multi-phase clock generation platform for parallel sampled-data systems.
ISCAS (1) 2004: 369-372 |
10 | EE | Sio-Weng Ting,
Kam-Weng Tam,
Rui Paulo Martins:
Novel interdigital microstrip bandpass filter with improved spurious response.
ISCAS (1) 2004: 984-987 |
9 | | Pui-In Mak,
Seng-Pan U.,
Rui Paulo Martins:
A low-IF/zero-IF reconfigurable receiver with two-step channel selection technique for multistandard applications.
ISCAS (4) 2004: 417-420 |
2003 |
8 | EE | Chon-In Lao,
Ho-leng Leong,
Kuoi-Fok Au,
Kuok-Hang Mok,
Seng-Pan U.,
Rui Paulo Martins:
A 10.7-MHz bandpass sigma-delta modulator using double-delay single-opamp SC resonator with double-sampling.
ISCAS (1) 2003: 1061-1064 |
7 | EE | Sai-Weng Sin,
Seng-Pan U.,
Rui Paulo Martins,
José E. Franca:
Timing-mismatch analysis in high-speed analog front-end with nonuniformly holding output.
ISCAS (1) 2003: 129-132 |
2002 |
6 | EE | Seng-Pan U.,
Rui Paulo Martins,
José E. Franca:
Design and analysis of low timing-skew clock generation for time-interleaved sampled-data systems.
ISCAS (4) 2002: 441-444 |
2001 |
5 | EE | Seng-Pan U.,
Rui Paulo Martins,
José E. Franca:
High-frequency low-power multirate SC realizations for NTSC/PAL digital video filtering.
ISCAS (1) 2001: 204-207 |
4 | EE | Seng-Pan U.,
Rui Paulo Martins,
José E. Franca:
A high-speed frequency up-translated SC bandpass filter with auto-zeroing for DDFS systems.
ISCAS (1) 2001: 320-323 |
1999 |
3 | EE | Seng-Pan U.,
Rui Paulo Martins,
José E. Franca:
Highly accurate mismatch-free SC delay circuits with reduced finite gain and offset sensitivity.
ISCAS (2) 1999: 57-60 |
2 | EE | Seng-Pan U.,
Rui Paulo Martins,
José E. Franca:
High performance multirate SC circuits with predictive correlated double sampling technique.
ISCAS (2) 1999: 77-80 |
1 | EE | Kam-Weng Tam,
P. Viror,
J. C. Freire,
Rui Paulo Martins:
New microwave bandstop filter using lumped and transversal network.
ISCAS (6) 1999: 30-32 |