| 2004 |
|---|
| 9 | | Pedro M. Figueiredo,
João C. Vital:
Termination of averaging networks in flash ADCs.
ISCAS (1) 2004: 121-124 |
| 8 | EE | Pedro M. Figueiredo,
João C. Vital:
Low kickback noise techniques for CMOS latched comparators.
ISCAS (1) 2004: 537-540 |
| 2003 |
|---|
| 7 | EE | Pedro M. Figueiredo,
João C. Vital:
Analysis of the averaging technique in flash ADCs.
ISCAS (1) 2003: 849-852 |
| 2001 |
|---|
| 6 | EE | Xu Jingnan,
João C. Vital,
Nuno Horta:
A Skill-based library for retargetable embedded analog cores.
DATE 2001: 768-769 |
| 5 | EE | Jorge Guilherme,
Pedro M. Figueiredo,
P. Azevedo,
G. Minderico,
A. Leal,
João C. Vital,
José E. Franca:
A pipeline 15-b 10-Msample/s analog-to-digital converter for ADSL applications.
ISCAS (1) 2001: 396-399 |
| 1995 |
|---|
| 4 | | João Goes,
João C. Vital,
José E. Franca:
Optimum Resolution-per-Stage in High-Speed Pipelined A/D Converters Using Self-Calibration.
ISCAS 1995: 525-528 |
| 1993 |
|---|
| 3 | | João C. Vital,
José E. Franca:
A Concurrent Two-step Flash Analogue-to-digital Converter Architecture.
ISCAS 1993: 1196-1199 |
| 2 | | João C. Vital,
José E. Franca,
Nuno S. Silva:
Fully-digital Testability of a High-speed Conversion System.
ISCAS 1993: 1595-1598 |
| 1 | | João C. Vital,
José E. Franca:
High-Speed A/D-D/A Conversion System with Flexible Testing Capabilities.
VLSI Design 1993: 357-362 |
