| 2005 |
|---|
| 6 | EE | Sanghyeon Baeg,
Sung Soo Chung:
Analytical test buffer design for differential signaling I/O buffers by error syndrome analysis.
IEEE Trans. VLSI Syst. 13(3): 370-383 (2005) |
| 2004 |
|---|
| 5 | EE | Heon C. Kim,
Hong Shin Jun,
Xinli Gu,
Sung Soo Chung:
At-Speed Interconnect Test and Diagnosis of External Memories on a System.
ITC 2004: 156-162 |
| 4 | EE | Hong Shin Jun,
Sung Soo Chung,
Sang H. Baeg:
Removing JTAG Bottlenecks in System Interconnect Test.
ITC 2004: 173-180 |
| 2002 |
|---|
| 3 | EE | Xinli Gu,
Weili Wang,
Kevin Li,
Heon C. Kim,
Sung Soo Chung:
Re-Using DFT Logic for Functional and Silicon Debugging Test.
ITC 2002: 648-656 |
| 2001 |
|---|
| 2 | | Xinli Gu,
Sung Soo Chung,
Frank Tsang,
Jan Arild Tofte,
Hamid Rahmanian:
An effort-minimized logic BIST implementation method.
ITC 2001: 1002-1010 |
| 1 | | Sung Soo Chung,
Sanghyeon Baeg:
AC-JTAG: empowering JTAG beyond testing DC nets.
ITC 2001: 30-37 |
