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Chie-Min Chao

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2006
6EEShih-Hao Ou, Tay-Jyi Lin, Chao-Wei Huang, Yu-Ting Kuo, Chie-Min Chao, Chih-Wei Liu, Chein-Wei Jen: A 52mW 1200MIPS compact DSP for multi-core media SoC. ASP-DAC 2006: 118-119
5EETay-Jyi Lin, Hung-Yueh Lin, Chie-Min Chao, Chih-Wei Liu, Chih-Wei Jen: A Compact DSP Core with Static Floating-Point Arithmetic. VLSI Signal Processing 42(2): 127-138 (2006)
2005
4EETay-Jyi Lin, Chie-Min Chao, Chia-Hsien Liu, Pi-Chen Hsiao, Shin-Kai Chen, Li-Chun Lin, Chih-Wei Liu, Chein-Wei Jen: A unified processor architecture for RISC & VLIW DSP. ACM Great Lakes Symposium on VLSI 2005: 50-55
3EEChia-Hsien Liu, Tay-Jyi Lin, Chie-Min Chao, Pi-Chen Hsiao, Li-Chun Lin, Shin-Kai Chen, Chao-Wei Huang, Chih-Wei Liu, Chein-Wei Jen: Hierarchical instruction encoding for VLIW digital signal processors. ISCAS (4) 2005: 3503-3506
2004
2EETay-Jyi Lin, Hung-Yueh Lin, Chie-Min Chao, Chih-Wei Liu, Chein-Wei Jen: A compact DSP core with static floating-point unit & its microcode generation. ACM Great Lakes Symposium on VLSI 2004: 57-60
1 Hung-Yueh Lin, Tay-Jyi Lin, Chie-Min Chao, Yen-Chin Liao, Chih-Wei Liu, Chein-Wei Jen: Static floating-point unit with implicit exponent tracking for embedded DSP. ISCAS (2) 2004: 821-824

Coauthor Index

1Shin-Kai Chen [3] [4]
2Pi-Chen Hsiao [3] [4]
3Chao-Wei Huang [3] [6]
4Chein-Wei Jen [1] [2] [3] [4] [6]
5Chih-Wei Jen [5]
6Yu-Ting Kuo [6]
7Yen-Chin Liao [1]
8Hung-Yueh Lin [1] [2] [5]
9Li-Chun Lin [3] [4]
10Tay-Jyi Lin [1] [2] [3] [4] [5] [6]
11Chia-Hsien Liu [3] [4]
12Chih-Wei Liu [1] [2] [3] [4] [5] [6]
13Shih-Hao Ou [6]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)