| 2004 |
|---|
| 6 | EE | Stephan Henzler,
Georg Georgakos,
Jörg Berthold,
Doris Schmitt-Landsiedel:
Single Supply Voltage High-Speed Semi-dynamic Level-Converting Flip-Flop with Low Power and Area Consumption.
PATMOS 2004: 392-401 |
| 5 | EE | Stephan Henzler,
Georg Georgakos,
Jörg Berthold,
Doris Schmitt-Landsiedel:
Two Level Compact Simulation Methodology for Timing Analysis of Power-Switched Circuits.
PATMOS 2004: 789-798 |
| 2003 |
|---|
| 4 | EE | Tim Schoenauer,
Jörg Berthold,
Christoph Heer:
Reduced Leverage of Dual Supply voltages in Ultra Deep Submicron Technologies.
PATMOS 2003: 41-50 |
| 3 | | Stephan Henzler,
Markus Koban,
Doris Schmitt-Landsiedel,
Jörg Berthold,
Georg Georgakos:
Design Aspects and Technological Scaling Limits of ZigZag Circuit Block Switch-Off Schemes.
VLSI-SOC 2003: 246-251 |
| 1997 |
|---|
| 2 | EE | M. Eisele,
Jörg Berthold,
Doris Schmitt-Landsiedel,
R. Mahnkopf:
The impact of intra-die device parameter variations on path delays and on the design for yield of low voltage digital circuits.
IEEE Trans. VLSI Syst. 5(4): 360-368 (1997) |
| 1996 |
|---|
| 1 | EE | M. Eisele,
Jörg Berthold,
Doris Schmitt-Landsiedel,
R. Mahnkopf:
The impact of intra-die device parameter variations on path delays and on the design for yield of low voltage digital circuits.
ISLPED 1996: 237-242 |
