| 2004 |
|---|
| 5 | EE | Thomas Bartenstein:
Panel 9 - Diagnostics vs. Failure Analysis.
ITC 2004: 1439 |
| 4 | EE | Brion L. Keller,
Mick Tegethoff,
Thomas Bartenstein,
Vivek Chickermane:
An Economic Analysis and ROI Model for Nanometer Test.
ITC 2004: 518-524 |
| 2001 |
|---|
| 3 | | Thomas Bartenstein,
Douglas Heaberlin,
Leendert M. Huisman,
David Sliwinski:
Diagnosing combinational logic designs using the single location at-a-time (SLAT) paradigm.
ITC 2001: 287-296 |
| 2000 |
|---|
| 2 | | Thomas Bartenstein:
Fault distinguishing pattern generation.
ITC 2000: 820-828 |
| 1997 |
|---|
| 1 | | Gilbert Vandling,
Thomas Bartenstein:
Fault Model Extension for Diagnosing Custom Cell Fails.
ITC 1997: 617-624 |
