Maurizio Skerlj

2009
2	EE	Alessandro Cevrero, Panagiotis Athanasopoulos, Hadi Parandeh-Afshar, Philip Brisk, Yusuf Leblebici, Paolo Ienne, Maurizio Skerlj: 3D configuration caching for 2D FPGAs. FPGA 2009: 286
2008
1	EE	Maurizio Skerlj, Paolo Ienne: Error Protected Data Bus Inversion Using Standard DRAM Components. ISQED 2008: 35-42

Coauthor Index

1	Panagiotis Athanasopoulos	[2]
2	Philip Brisk	[2]
3	Alessandro Cevrero	[2]
4	Paolo Ienne	[1] [2]
5	Yusuf Leblebici	[2]
6	Hadi Parandeh-Afshar	[2]