2003 |
14 | EE | Yinshui Xia,
Xunwei Wu,
A. E. A. Almaini:
Power Minimization of FPRM Functions Based on Polarity Conversion.
J. Comput. Sci. Technol. 18(3): 325-331 (2003) |
2002 |
13 | EE | Yinshui Xia,
Xunwei Wu,
Penjung Wang:
Design of Ternary Schmitt Triggers Based on Its Sequential Characteristics.
ISMVL 2002: 156-160 |
2000 |
12 | EE | Massoud Pedram,
Xunwei Wu:
Analysis of power-clocked CMOS with application to the design of energy-recovery circuits.
ASP-DAC 2000: 339-344 |
11 | EE | Xunwei Wu,
Jian Wei,
Massoud Pedram,
Qing Wu:
Low-power design of sequential circuits using a quasi-synchronous derived clock.
ASP-DAC 2000: 345-350 |
10 | EE | Xunwei Wu,
Massoud Pedram:
Low power sequential circuit design by using priority encoding and clock gating.
ISLPED 2000: 143-148 |
9 | EE | Xunwei Wu,
Xuanchang Zhou:
Novel ?-Type Resistor Network in D/A Converter Based on Multiple-Valued Logic.
ISMVL 2000: 227- |
8 | EE | Xunwei Wu,
Massoud Pedram:
Propagation Algorithm of Behavior Probability in Power Estimation Based on Multiple-Valued Logic.
ISMVL 2000: 453-459 |
1998 |
7 | | Massoud Pedram,
Qing Wu,
Xunwei Wu:
A New Design for Double Edge Triggered Flip-flops.
ASP-DAC 1998: 417-421 |
1997 |
6 | | Rakesh Mehrotra,
Massoud Pedram,
Xunwei Wu:
Comparison between nMos Pass Transistor logic style vs. CMOS Complementary Cells.
ICCD 1997: 130-135 |
5 | EE | Xunwei Wu,
Massoud Pedram:
Design of Ternary CCD Circuits Referencing to Current-Mode CMOS Circuits.
ISMVL 1997: 209-214 |
1995 |
4 | EE | Shoujue Wang,
Xunwei Wu,
Hongjuan Feng:
The High-Speed Ternary Logic Gates Based on the Multiple beta Transistors.
ISMVL 1995: 178-181 |
3 | EE | Xunwei Wu,
Xiexiong Chen,
Jizhong Shen:
Race-Hazard and Skip-Hazard in Multivalued Combinational Circuits.
ISMVL 1995: 222-227 |
1992 |
2 | | Xunwei Wu:
The Theory of Clipping Voltage-Switches and Design of Quaternary nMOS Circuits.
ISMVL 1992: 119-125 |
1991 |
1 | | Xunwei Wu,
Xiaowei Deng:
Theory of Grounded Current Switches and Quatemary IIL Circuits.
ISMVL 1991: 210-215 |