2005 |
7 | | Yinshui Xia,
Xien Ye,
Lun-Yao Wang,
Zong-Gang Zhou:
Novel synthesis method of mixed polarity Reed-Muller functions.
Circuits, Signals, and Systems 2005: 148-153 |
6 | EE | Yinshui Xia,
Lun-Yao Wang,
A. E. A. Almaini:
A Novel Multiple-Valued CMOS Flip-Flop Employing Multiple-Valued Clock.
J. Comput. Sci. Technol. 20(2): 237-242 (2005) |
5 | EE | Yinshui Xia,
Lun-Yao Wang,
Zong-Gang Zhou,
Xien Ye,
Jian-Ping Hu:
Novel Synthesis and Optimization of Multi-Level Mixed Polarity Reed-Muller Functions.
J. Comput. Sci. Technol. 20(6): 895-900 (2005) |
2003 |
4 | EE | Yinshui Xia,
B. Ali,
A. E. A. Almaini:
Area and power optimization of FPRM function based circuits.
ISCAS (5) 2003: 329-332 |
3 | EE | Yinshui Xia,
Xunwei Wu,
A. E. A. Almaini:
Power Minimization of FPRM Functions Based on Polarity Conversion.
J. Comput. Sci. Technol. 18(3): 325-331 (2003) |
2002 |
2 | EE | Yinshui Xia,
A. E. A. Almaini:
Best Polarity for Low Power XOR Gate Decomposition.
DSD 2002: 53-59 |
1 | EE | Yinshui Xia,
Xunwei Wu,
Penjung Wang:
Design of Ternary Schmitt Triggers Based on Its Sequential Characteristics.
ISMVL 2002: 156-160 |