2008 |
17 | EE | Roberto Perez-Andrade,
René Cumplido,
Claudia Feregrino Uribe,
Fernando Martin del Campo:
A versatile hardware architecture for a CFAR detector based on a linear insertion sorter.
FPL 2008: 467-470 |
16 | EE | Roberto Perez-Andrade,
René Cumplido,
Fernando Martin del Campo,
Claudia Feregrino Uribe:
A Versatile Linear Insertion Sorter Based on a FIFO Scheme.
ISVLSI 2008: 357-362 |
15 | EE | Raúl Rodríguez-Colín,
Claudia Feregrino Uribe,
Jose-Alberto Martinez Villanueva:
Robust Watermarking Scheme Applied to Radiological Medical Images.
IEICE Transactions 91-D(3): 862-864 (2008) |
2007 |
14 | EE | Alejandro Rojas,
René Cumplido,
Jesús Ariel Carrasco-Ochoa,
Claudia Feregrino Uribe,
José Francisco Martínez Trinidad:
FPGA-Based Architecture for Computing Testors.
IDEAL 2007: 188-197 |
2006 |
13 | | Claudia Feregrino Uribe,
Janeth Cruz Enríquez,
J. Alejandro Díaz Méndez:
JIISIC'06 - V Jornadas Iberoamericanas de Ingeniería de Software e Ingeniería del Conocimiento, Memoria Técnica, Proceedings, Puebla, Pue. México, 1 al 3 de Febrero de 2006
JIISIC 2006 |
12 | EE | René Cumplido,
Jesús Ariel Carrasco-Ochoa,
Claudia Feregrino:
On the Design and Implementation of a High Performance Configurable Architecture for Testor Identification.
CIARP 2006: 665-673 |
11 | EE | Ignacio Algredo-Badillo,
Claudia Feregrino Uribe,
René Cumplido:
Design and Implementation of an FPGA-Based 1.452-Gbps Non-pipelined AES Architecture.
ICCSA (3) 2006: 456-465 |
10 | EE | Roshan Duraisamy,
Zoran A. Salcic,
Miguel Morales-Sandoval,
Claudia Feregrino Uribe:
A Fast Elliptic Curve Based Key Agreement Protocol-on-Chip (PoC) for Securing Networked Embedded Systems.
RTCSA 2006: 154-161 |
2005 |
9 | EE | Miguel Morales-Sandoval,
Claudia Feregrino Uribe:
A Hardware Architecture for Elliptic Curve Cryptography and Lossless Data Compression.
CONIELECOMP 2005: 113-118 |
8 | EE | Carlos Avendaño Pérez,
Claudia Feregrino Uribe,
Gonzalo Navarro:
Approximate Searching on Compressed Text.
CONIELECOMP 2005: 258-261 |
2004 |
7 | EE | Miguel Morales-Sandoval,
Claudia Feregrino Uribe:
On the Hardware Design of an Elliptic Curve Cryptosystem.
ENC 2004: 64-70 |
2003 |
6 | EE | Claudia Feregrino Uribe:
High Performance PPMC Compression Algorithm.
ENC 2003: 135- |
2001 |
5 | EE | Claudia Feregrino Uribe,
S. R. Jones:
Optimisation of PPMC Model for Hardware Implementation.
DSD 2001: 120-126 |
4 | EE | Jose Luis Nunez,
Claudia Feregrino,
Simon Jones,
Stephen Bateman:
X-MatchPRO: A ProASIC-Based 200 Mbytes/s Full-Duplex Lossless Data Compressor.
FPL 2001: 613-617 |
3 | EE | Riad Stefo,
Jose Luis Nunez,
Claudia Feregrino,
Sudipta Mahapatra,
Simon Jones:
FPGA-Based Modelling Unit for High Speed Lossless Arithmetic Coding.
FPL 2001: 643-647 |
1999 |
2 | EE | Jose Luis Nunez,
Claudia Feregrino,
Simon Jones,
Stephen Bateman:
The X-MatchLITE FPGA-Based Data Compressor.
EUROMICRO 1999: 1126-1132 |
1 | EE | Jose Luis Nunez,
Claudia Feregrino,
Stephen Bateman,
Simon Jones:
The X-MatchLITE FPGA-Based Data Compressor.
FPGA 1999: 255 |