2004 |
8 | EE | Nikolaos G. Bartzoudis,
Alexandros G. Fragkiadakis,
David J. Parish,
Jose Luis Nunez:
A System for Fault Detection and Reconfiguration of Hardware Based Active Networks.
IOLTS 2004: 207-213 |
7 | EE | Mark Milward,
Jose Luis Nunez,
David Mulvaney:
Design and Implementation of a Lossless Parallel High-Speed Data Compression System.
IEEE Trans. Parallel Distrib. Syst. 15(6): 481-490 (2004) |
2003 |
6 | | Nikolaos G. Bartzoudis,
Alexandros G. Fragkiadakis,
David J. Parish,
Jose Luis Nunez,
Mark Sandford:
Reconfigurable Computing and Active Networks.
Engineering of Reconfigurable Systems and Algorithms 2003: 280-283 |
5 | | Mark Milward,
Jose Luis Nunez,
David Mulvaney:
Routing Strategies for High Speed Parallel Data Compression.
PDPTA 2003: 635-641 |
2001 |
4 | EE | Jose Luis Nunez,
Claudia Feregrino,
Simon Jones,
Stephen Bateman:
X-MatchPRO: A ProASIC-Based 200 Mbytes/s Full-Duplex Lossless Data Compressor.
FPL 2001: 613-617 |
3 | EE | Riad Stefo,
Jose Luis Nunez,
Claudia Feregrino,
Sudipta Mahapatra,
Simon Jones:
FPGA-Based Modelling Unit for High Speed Lossless Arithmetic Coding.
FPL 2001: 643-647 |
1999 |
2 | EE | Jose Luis Nunez,
Claudia Feregrino,
Simon Jones,
Stephen Bateman:
The X-MatchLITE FPGA-Based Data Compressor.
EUROMICRO 1999: 1126-1132 |
1 | EE | Jose Luis Nunez,
Claudia Feregrino,
Stephen Bateman,
Simon Jones:
The X-MatchLITE FPGA-Based Data Compressor.
FPGA 1999: 255 |