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1998 | ||
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4 | EE | S. Turgis, Daniel Auvergne: A novel macromodel for power estimation in CMOS structures. IEEE Trans. on CAD of Integrated Circuits and Systems 17(11): 1090-1098 (1998) |
1997 | ||
3 | EE | S. Turgis, Jean Michel Daga, J. M. Portal, Daniel Auvergne: Internal power modelling and minimization in CMOS inverters. ED&TC 1997: 603-608 |
1995 | ||
2 | EE | S. Turgis, Nadine Azémard, Daniel Auvergne: Explicit evaluation of short circuit power dissipation for CMOS logic structures. ISLPD 1995: 129-134 |
1994 | ||
1 | Michel Robert, P. Gorria, Johel Mitéran, S. Turgis: Design of a Real Time Geometric Classifier. EDAC-ETC-EUROASIC 1994: 656 |
1 | Daniel Auvergne | [2] [3] [4] |
2 | Nadine Azémard (Nadine Azémard-Crestani) | [2] |
3 | Jean Michel Daga | [3] |
4 | P. Gorria | [1] |
5 | Johel Mitéran | [1] |
6 | J. M. Portal | [3] |
7 | Michel Robert | [1] |