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S. Turgis

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1998
4EES. Turgis, Daniel Auvergne: A novel macromodel for power estimation in CMOS structures. IEEE Trans. on CAD of Integrated Circuits and Systems 17(11): 1090-1098 (1998)
1997
3EES. Turgis, Jean Michel Daga, J. M. Portal, Daniel Auvergne: Internal power modelling and minimization in CMOS inverters. ED&TC 1997: 603-608
1995
2EES. Turgis, Nadine Azémard, Daniel Auvergne: Explicit evaluation of short circuit power dissipation for CMOS logic structures. ISLPD 1995: 129-134
1994
1 Michel Robert, P. Gorria, Johel Mitéran, S. Turgis: Design of a Real Time Geometric Classifier. EDAC-ETC-EUROASIC 1994: 656

Coauthor Index

1Daniel Auvergne [2] [3] [4]
2Nadine Azémard (Nadine Azémard-Crestani) [2]
3Jean Michel Daga [3]
4P. Gorria [1]
5Johel Mitéran [1]
6J. M. Portal [3]
7Michel Robert [1]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)