2006 |
3 | EE | Eric N. Tran,
Vishwashanth Kasulasrinivas,
Sreejit Chakravarty:
Silicon Evaluation of Logic Proximity Bridge Patterns.
VTS 2006: 78-85 |
2005 |
2 | EE | Sreejit Chakravarty,
Yi-Shing Chang,
Hiep Hoang,
Sridhar Jayaraman,
Silvio Picano,
Cheryl Prunty,
Eric W. Savage,
Rehan Sheikh,
Eric N. Tran,
Khen Wee:
Experimental Evaluation of Bridge Patterns for a High Performance Microprocessor.
VTS 2005: 337-342 |
2004 |
1 | EE | Sreejit Chakravarty,
Eric W. Savage,
Eric N. Tran:
Defect Coverage Analysis of Partitioned Testing.
ITC 2004: 907-915 |