| 2007 |
|---|
| 7 | EE | Harry I. A. Chen,
Edward K. W. Loo,
James B. Kuo,
Marek Syrzycki:
Triple-Threshold Static Power Minimization in High-Level Synthesis of VLSI CMOS.
PATMOS 2007: 453-462 |
| 2004 |
|---|
| 6 | | Krzysztof Iniewski,
Sebastian Magierowski,
Marek Syrzycki:
Phase Locked Loop gain shaping for gigahertz operation.
ISCAS (4) 2004: 157-160 |
| 5 | EE | Krzysztof Iniewski,
Marek Syrzycki:
Low Power 2.5 Gb/s Serializer for SOC Applications.
ISVLSI 2004: 211-212 |
| 4 | EE | Krzysztof Iniewski,
Valery Axelrad,
Andrei Shibkov,
Artur Balasinski,
Marek Syrzycki:
Design Strategies for ESD Protection in SOC.
IWSOC 2004: 210-214 |
| 3 | EE | Krzysztof Iniewski,
R. Badalone,
M. Lapointe,
Marek Syrzycki:
SERDES Technology for Gigabit I/O Communications in Storage Area Networking.
IWSOC 2004: 247-252 |
| 2002 |
|---|
| 2 | EE | Pedram Khademsameni,
Marek Syrzycki:
Manufacturability Analysis of Analog CMOS ICs through Examination of Multiple Layout Solutions.
DFT 2002: 3-11 |
| 1992 |
|---|
| 1 | | Glenn H. Chapman,
M. Parameswaran,
Marek Syrzycki:
Wafer-Scale Transducer Arrays.
IEEE Computer 25(4): 50-56 (1992) |
