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Jaskirat Singh

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2008
8EEJaskirat Singh, Sachin S. Sapatnekar: A Scalable Statistical Static Timing Analyzer Incorporating Correlated Non-Gaussian and Gaussian Parameter Variations. IEEE Trans. on CAD of Integrated Circuits and Systems 27(1): 160-173 (2008)
7EEJaskirat Singh, Zhi-Quan Luo, Sachin S. Sapatnekar: A Geometric Programming-Based Worst Case Gate Sizing Method Incorporating Spatial Correlation. IEEE Trans. on CAD of Integrated Circuits and Systems 27(2): 295-308 (2008)
2006
6EEJaskirat Singh, Sachin S. Sapatnekar: Statistical timing analysis with correlated non-gaussian parameters using independent component analysis. DAC 2006: 155-160
5EEJaskirat Singh, Sachin S. Sapatnekar: Partition-Based Algorithm for Power Grid Design Using Locality. IEEE Trans. on CAD of Integrated Circuits and Systems 25(4): 664-677 (2006)
2005
4EEJaskirat Singh, Vidyasagar Nookala, Zhi-Quan Luo, Sachin S. Sapatnekar: Robust gate sizing by geometric programming. DAC 2005: 315-320
3EEJaskirat Singh, Sachin S. Sapatnekar: A fast algorithm for power grid design. ISPD 2005: 70-77
2EEJaskirat Singh, Sachin S. Sapatnekar: Congestion-aware topology optimization of structured power/ground networks. IEEE Trans. on CAD of Integrated Circuits and Systems 24(5): 683-695 (2005)
2004
1EEJaskirat Singh, Sachin S. Sapatnekar: Topology optimization of structured power/ground networks. ISPD 2004: 116-123

Coauthor Index

1Zhi-Quan Luo [4] [7]
2Vidyasagar Nookala [4]
3Sachin S. Sapatnekar [1] [2] [3] [4] [5] [6] [7] [8]

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