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Balasubramanian Sethuraman

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2009
9EEBalasubramanian Sethuraman, Ranga Vemuri: A methodology for application-specific NoC architecture generation in a dynamic task structure environment. ACM Great Lakes Symposium on VLSI 2009: 149-152
2007
8EEBalasubramanian Sethuraman, Ranga Vemuri: Power variations of multi-port routers in an application-specific NoC design : A case study. ICCD 2007: 595-600
7EEBalasubramanian Sethuraman, Ranga Vemuri: Multicasting based topology generation and core mapping for a power efficient networks-on-chip. ISLPED 2007: 399-402
6EEBalasubramanian Sethuraman, Ranga Vemuri: A Force-directed Approach for Fast Generation of Efficient Multi-Port NoC Architectures. VLSI Design 2007: 419-426
2006
5EEBalasubramanian Sethuraman, Ranga Vemuri: optiMap: a tool for automated generation of noc architectures using multi-port routers for FPGAs. DATE 2006: 947-952
4EEBalasubramanian Sethuraman: Novel Methodologies for Performance & Power Efficient Reconfigurable Networks-on-Chip. FPL 2006: 1-2
3EEBalasubramanian Sethuraman, Ranga Vemuri: Multi2 Router: A Novel Multi Local Port Router Architecture with Broadcast Facility for FPGA-Based Networks-on-Chip. FPL 2006: 1-4
2005
2EEBalasubramanian Sethuraman, Prasun Bhattacharya, Jawad Khan, Ranga Vemuri: LiPaR: A light-weight parallel router for FPGA-based networks-on-chip. ACM Great Lakes Symposium on VLSI 2005: 452-457
2004
1 Jawad Khan, Balasubramanian Sethuraman, Ranga Vemuri: A Power-Performance Trade-off Methodology for Portable Reconfigurable Platforms. ERSA 2004: 33-37

Coauthor Index

1Prasun Bhattacharya [2]
2Jawad Khan [1] [2]
3Ranga Vemuri [1] [2] [3] [5] [6] [7] [8] [9]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)