Dipanjan Sengupta

List of publications from the DBLP Bibliography Server - FAQ

2009

5 EE Dipanjan Sengupta, Resve A. Saleh: Application-Driven Voltage-Island Partitioning for Low-Power System-on-Chip Design. IEEE Trans. on CAD of Integrated Circuits and Systems 28(3): 316-326 (2009)

2008

4 EE Dipanjan Sengupta, Resve A. Saleh: Application-driven floorplan-aware voltage island design. DAC 2008: 155-160

3 EE Dipanjan Sengupta, Resve A. Saleh: Supply voltage selection in Voltage Island based SoC design. SoCC 2008: 219-222

2007

2 EE Dipanjan Sengupta, Resve Saleh: Generalized Power-Delay Metrics in Deep Submicron CMOS Designs. IEEE Trans. on CAD of Integrated Circuits and Systems 26(1): 183-189 (2007)

2005

1 EE Dipanjan Sengupta, Resve A. Saleh: Power-Delay Metrics Revisited for 90nm CMOS Technology. ISQED 2005: 291-296

2009
5	EE	Dipanjan Sengupta, Resve A. Saleh: Application-Driven Voltage-Island Partitioning for Low-Power System-on-Chip Design. IEEE Trans. on CAD of Integrated Circuits and Systems 28(3): 316-326 (2009)
2008
4	EE	Dipanjan Sengupta, Resve A. Saleh: Application-driven floorplan-aware voltage island design. DAC 2008: 155-160
3	EE	Dipanjan Sengupta, Resve A. Saleh: Supply voltage selection in Voltage Island based SoC design. SoCC 2008: 219-222
2007
2	EE	Dipanjan Sengupta, Resve Saleh: Generalized Power-Delay Metrics in Deep Submicron CMOS Designs. IEEE Trans. on CAD of Integrated Circuits and Systems 26(1): 183-189 (2007)
2005
1	EE	Dipanjan Sengupta, Resve A. Saleh: Power-Delay Metrics Revisited for 90nm CMOS Technology. ISQED 2005: 291-296

Coauthor Index

1 Resve A. Saleh (Resve Saleh, Res Saleh) [1] [2] [3] [4] [5]