| 1996 |
|---|
| 8 | | Jos van Sas,
Urbain Swerts,
Marc Darquennes:
Towards an Effective IDDQ Test Vector Selection and Application Methodology.
ITC 1996: 491-500 |
| 1995 |
|---|
| 7 | | Jos van Sas,
Erik Huyskens,
Hans Naert,
Fred Schell,
A. J. van de Goor:
Coping with Re-usability Using Sequential ATPG: A Practical Case Study.
ITC 1995: 252-261 |
| 1994 |
|---|
| 6 | | Hans A. R. Manhaeve,
Paul L. Wrighton,
Jos van Sas,
Urbain Swerts:
An Off-chip IDDQ Current Measurement Unit for Telecommunication ASICs.
ITC 1994: 203-212 |
| 5 | EE | Jos van Sas,
Francky Catthoor,
Hugo De Man:
Cellular automata based deterministic self-test strategies for programmable data paths.
IEEE Trans. on CAD of Integrated Circuits and Systems 13(7): 940-949 (1994) |
| 4 | EE | Jos van Sas,
Chay Nowé,
Didier Pollet,
Francky Catthoor,
Paul Vanoostende,
Hugo De Man:
Design of a C-testable booth multiplier using a realistic fault model.
J. Electronic Testing 5(1): 29-41 (1994) |
| 1993 |
|---|
| 3 | | Jos van Sas,
Geert van Wauwe,
Erik Huyskens,
Dirk Rabaey:
BIST for Embedded Static RAMs with Coverage Calculation.
ITC 1993: 339-348 |
| 2 | EE | Jos van Sas,
Francky Catthoor,
Hugo De Man:
Test Algorithms for Double-Buffered Random Access and Pointer-Addressed Memories.
IEEE Design & Test of Computers 10(2): 34-44 (1993) |
| 1992 |
|---|
| 1 | | Jos van Sas,
Francky Catthoor,
Hugo De Man:
Optimized BIST Strategies for Programmable Data Paths Based on Cellular Automata.
ITC 1992: 110-119 |
