2006 |
5 | EE | Jinjun Xiong,
Yiu-Chung Wong,
Egino Sarto,
Lei He:
Constraint driven I/O planning and placement for chip-package co-design.
ASP-DAC 2006: 207-212 |
4 | EE | Kaushik Sheth,
Egino Sarto,
Joel McGrath:
The importance of adopting a package-aware chip design flow.
DAC 2006: 853-856 |
2000 |
3 | EE | Andrew B. Kahng,
Sudhakar Muddu,
Egino Sarto:
On switch factor based analysis of coupled RC interconnects.
DAC 2000: 79-84 |
1999 |
2 | | Andrew B. Kahng,
Sudhakar Muddu,
Egino Sarto:
Interconnect Optimization Strategies for High-Performance VLSI Designs.
VLSI Design 1999: 464-469 |
1998 |
1 | EE | Andrew B. Kahng,
Sudhakar Muddu,
Egino Sarto,
Rahul Sharma:
Interconnect Tuning Strategies for High-Performance Ics.
DATE 1998: 471-478 |