| |
| 2005 | ||
|---|---|---|
| 5 | EE | Shaolei Quan, Qiang Qiang, Chin-Long Wey: Design of a CMOS Operational Amplifier for Extreme-Voltage Stress Test. Asian Test Symposium 2005: 70-75 |
| 4 | EE | Shaolei Quan, Meng-Yao Liu, Chin-Long Wey: Design of a CMOS Operational Amplifier Amenable to Extreme Voltage Stress. DFT 2005: 563-572 |
| 3 | EE | Shaolei Quan, Qiang Qiang, Chin-Long Wey: A novel reconfigurable architecture of low-power unsigned multiplier for digital signal processing. ISCAS (4) 2005: 3327-3330 |
| 2004 | ||
| 2 | EE | Shaolei Quan, Chin-Long Wey: A noise optimization technique for codesign of CMOS radio-frequency low noise amplifiers and low-quality spiral inductors. ACM Great Lakes Symposium on VLSI 2004: 178-182 |
| 1 | Cheong Kun, Shaolei Quan, Andrew Mason: A power-optimized 64-bit priority encoder utilizing parallel priority look-ahead. ISCAS (2) 2004: 753-756 | |
| 1 | Cheong Kun | [1] |
| 2 | Meng-Yao Liu | [4] |
| 3 | Andrew Mason | [1] |
| 4 | Qiang Qiang | [3] [5] |
| 5 | Chin-Long Wey | [2] [3] [4] [5] |