2008 |
17 | EE | Wei Han,
Ying Yi,
Mark Muir,
Ioannis Nousias,
Tughrul Arslan,
Ahmet T. Edorgan:
Efficient Implementation of Wireless Applications on Multi-core Platforms Based on Dynamically Reconfigurable Processors.
CISIS 2008: 837-842 |
16 | EE | Wei Han,
Ying Yi,
Mark Muir,
Ioannis Nousias,
Tughrul Arslan,
Ahmet T. Edorgan:
Multi-core Architectures with Dynamically Reconfigurable Array Processors for the WiMAX Physical Layer.
SASP 2008: 115-120 |
15 | EE | Mark Muir,
Iain Lindsay,
Tughrul Arslan,
Ioannis Nousias,
Sami Khawam,
Mark Milward,
Nazish Aslam,
Adam Major:
Extensible software emulator for reconfigurable instruction cell based processors.
SoCC 2008: 35-40 |
14 | EE | Wei Han,
Ying Yi,
Mark Muir,
Ioannis Nousias,
Tughrul Arslan,
Ahmet T. Edorgan:
MRPSIM: A TLM based simulation tool for MPSOCS targeting dynamically reconfigurable processors.
SoCC 2008: 41-44 |
13 | EE | Sami Khawam,
Ioannis Nousias,
Mark Milward,
Ying Yi,
Mark Muir,
Tughrul Arslan:
The Reconfigurable Instruction Cell Array.
IEEE Trans. VLSI Syst. 16(1): 75-85 (2008) |
2007 |
12 | EE | Adam Major,
Ioannis Nousias,
Sami Khawam,
Mark Milward,
Ying Yi,
Tughrul Arslan:
H.264/AVC In-Loop De-Blocking Filter Targeting a Dynamically Reconfigurable Instruction Cell Based Architecture.
AHS 2007: 134-138 |
11 | EE | Ioannis Nousias,
Sami Khawam,
Mark Milward,
Mark Muir,
Tughrul Arslan:
A Multi-object GA Based Physical Placement Algorithm for Heterogeneous Dynamicaly Reconfigurable Arrays.
AHS 2007: 504-510 |
10 | EE | Nazish Aslam,
Mark Milward,
Ioannis Nousias,
Tughrul Arslan,
Ahmet T. Erdogan:
Code Compressor and Decompressor for Ultra Large Instruction Width Coarse-Grain Reconfigurable Systems.
FCCM 2007: 297-298 |
9 | EE | Han Wei,
Mark Muir,
Ioannis Nousias,
Tughrul Arslan,
Ahmet T. Erdogan:
Mapping Real Time Operating System on Reconfigurable Instruction Cell Based Architectures.
FCCM 2007: 301-304 |
8 | EE | Adam Major,
Ioannis Nousias,
Sami Khawam,
Mark Milward,
Ying Yi,
Mark Muir,
Tughrul Arslan:
H.264/AVC In-Loop De-Blocking Filter Targeting a Dynamically Reconfigurable Instruction Cell Based Architecture.
FPL 2007: 228-233 |
7 | EE | Wei Han,
Ioannis Nousias,
Mark Muir,
Tughrul Arslan,
Ahmet T. Erdogan:
The Design of Multitasking Based Applications on Reconfigurable Instruction Cell Bsed Architectures.
FPL 2007: 447-452 |
6 | EE | Ioannis Nousias,
Sami Khawam,
Mark Milward,
Mark Muir,
Tughrul Arslan:
A Multi Objective GA based Physical Placement Algorithm for Heterogeneous Dynamically Reconfigurable Arrays.
FPL 2007: 497-500 |
5 | EE | Nazish Aslam,
Mark Milward,
Ioannis Nousias,
Tughrul Arslan,
Ahmet T. Erdogan:
Code Compression and Decompression for Instruction Cell Based Reconfigurable Systems.
IPDPS 2007: 1-7 |
2006 |
4 | EE | Ioannis Nousias,
Tughrul Arslan:
Wormhole Routing with Virtual Channels using Adaptive Rate Control for Network-on-Chip (NoC).
AHS 2006: 420-423 |
3 | EE | Ying Yi,
Ioannis Nousias,
Mark Milward,
Sami Khawam,
Tughrul Arslan,
Iain Lindsay:
System-level scheduling on instruction cell based reconfigurable systems.
DATE 2006: 381-386 |
2005 |
2 | EE | Adeoye Olugbon,
Sami Khawam,
Tughrul Arslan,
Ioannis Nousias,
Iain Lindsay:
An AMBA AHB-based reconfigurable SOC architecture using multiplicity of dedicated flyby DMA blocks.
ASP-DAC 2005: 1256-1259 |
1 | EE | Ying Yi,
Mark Milward,
Sami Khawam,
Ioannis Nousias,
Tughrul Arslan:
Automatic synthesis and scheduling of multirate DSP algorithms.
ASP-DAC 2005: 635-638 |