dblp.uni-trier.dewww.uni-trier.de

Pui-In Mak

List of publications from the DBLP Bibliography Server - FAQ
Coauthor Index - Ask others: ACM DL/Guide - CiteSeer - CSB - Google - MSN - Yahoo

2008
7EEPui-In Mak, Ka-Hou Ao Ieong, Rui Paulo Martins: An open-source-input, ultra-wideband LNA with mixed-voltage ESD protection for full-band (170-to-1700 MHz) mobile TV tuners. ISCAS 2008: 668-671
2007
6EEWeng-leng Mok, Pui-In Mak, Seng-Pan U., Rui Paulo Martins: A Highly-Linear Successive-Approximation Front-End Digitizer with Built-in Sample-and-Hold Function for Pipeline/Two-Step ADC. ISCAS 2007: 1947-1950
2006
5EEPui-In Mak, Seng-Pan U., Rui Paulo Martins: Design and test strategy underlying a low-voltage analog-baseband IC for 802.11a/b/g WLAN SiP receivers. ISCAS 2006
2005
4EEKa-Hou Ao Ieong, Chong-Yin Fok, Pui-In Mak, Seng-Pan U., Rui Paulo Martins: A frequency up-conversion and two-step channel selection embedded CMOS D/A interface. ISCAS (1) 2005: 392-395
2004
3 Pui-In Mak, Kin-Kwan Ma, Weng-leng Mok, Chi-sam Sou, Kit-man Ho, Cheng-Man Ng, Seng-Pan U., Rui Paulo Martins: An I/Q-multiplexed and OTA-shared CMOS pipelined ADC with an A-DQS S/H front-end for two-step-channel-select low-IF receiver. ISCAS (1) 2004: 1068-1071
2 Pui-In Mak, Seng-Pan U., Rui Paulo Martins: A low-IF/zero-IF reconfigurable receiver with two-step channel selection technique for multistandard applications. ISCAS (4) 2004: 417-420
1 Pui-In Mak, Man-Chung Wong, Seng-Pan U.: A 3D PWM control, H-bridge tri-level inverter for power quality compensation in three-phase four-wired systems. ISCAS (5) 2004: 948-951

Coauthor Index

1Chong-Yin Fok [4]
2Kit-man Ho [3]
3Ka-Hou Ao Ieong [4] [7]
4Kin-Kwan Ma [3]
5Rui Paulo Martins [2] [3] [4] [5] [6] [7]
6Weng-leng Mok [3] [6]
7Cheng-Man Ng [3]
8Chi-sam Sou [3]
9Seng-Pan U. [1] [2] [3] [4] [5] [6]
10Man-Chung Wong [1]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)