Philip Machanick

2007
14	EE	John Shield, Peter Sutton, Philip Machanick: Dynamic Cache Switching in Reconfigurable Embedded Systems. FPL 2007: 111-116
13	EE	John Shield, Peter Sutton, Philip Machanick: Analysis of Kernel Effects on Optimisation Mismatch in Cache Reconfiguration. FPL 2007: 625-628
12	EE	Philip Machanick: Design principles for a virtual multiprocessor. SAICSIT Conf. 2007: 76-82
2006
11	EE	Kenneth M. Wilson, Philip Machanick: SecureTorrent: A Security Framework for File Swarming. Asia-Pacific Computer Systems Architecture Conference 2006: 538-544
2005
10	EE	Philip Machanick: Peer Assessment for Action Learning of Data Structures and Algorithms. ACE 2005: 73-82
9	EE	Philip Machanick: A distributed systems approach to secure Internet mail. Computers & Security 24(6): 492-499 (2005)
8	EE	Philip Machanick: The Value of a Small Microkernel for Dreamy Memory and the RAMpage Memory Hierarchy. J. Comput. Sci. Technol. 20(5): 586-595 (2005)
2004
7	EE	Philip Machanick: Initial Experiences with Dreamy Memory and the RAMpage Memory Hierarchy. Asia-Pacific Computer Systems Architecture Conference 2004: 146-159
2003
6	EE	Philip Machanick, Zunaid Patel: L1 Cache and TLB Enhancements to the RAMpage Memory Hierarchy. Asia-Pacific Computer Systems Architecture Conference 2003: 305-319
5	EE	Philip Machanick, Brynn Andrew: Latency Improvement in Virtual Multicasting. Asia-Pacific Computer Systems Architecture Conference 2003: 380-394
2001
4	EE	Judith L. Gersting, Peter B. Henderson, Philip Machanick, Yale N. Patt: Programming early considered harmful. SIGCSE 2001: 402-403
2000
3	EE	Ross J. Anderson, Terry Bollinger, Doug Brown, Enrique Draier, Philip Machanick, Gary McGraw, Nancy R. Mead, Arthur B. Pyster, Howard Schmidt, Timothy J. Shimeall: Roundtable on Information Security Policy. IEEE Software 17(5): (2000)
2		Philip Machanick, Brynn Andrew: Virtual multicasting as an example of information mass transit. South African Computer Journal 26: 252-255 (2000)
1998
1	EE	Philip Machanick, Pierre Salverda, Lance Pompe: Hardware-Software Trade-Offs in a Direct Rambus Implementation of the RAMpage Memory Hierarchy. ASPLOS 1998: 105-114

Coauthor Index

1	Ross J. Anderson	[3]
2	Brynn Andrew	[2] [5]
3	Terry Bollinger	[3]
4	Doug Brown	[3]
5	Enrique Draier	[3]
6	Judith L. Gersting	[4]
7	Peter B. Henderson	[4]
8	Gary McGraw	[3]
9	Nancy R. Mead	[3]
10	Zunaid Patel	[6]
11	Yale N. Patt	[4]
12	Lance Pompe	[1]
13	Arthur B. Pyster	[3]
14	Pierre Salverda	[1]
15	Howard Schmidt	[3]
16	John Shield	[13] [14]
17	Timothy J. Shimeall	[3]
18	Peter Sutton	[13] [14]
19	Kenneth M. Wilson	[11]

Colors in the list of coauthors