| 2009 |
|---|
| 9 | EE | Hsing-Chung Liang:
Improved Representatives for Judging Unrepairability and Deciding Economic Repair Solutions of Memories.
Journal of Circuits, Systems, and Computers 18(1): 81-95 (2009) |
| 2006 |
|---|
| 8 | EE | Hsing-Chung Liang,
Le-Quen Tzeng:
Improved Representatives for Unrepairability Judging and Economic Repair Solutions of Memories.
MTDT 2006: 15 |
| 2005 |
|---|
| 7 | EE | Hsing-Chung Liang,
Wen-Chin Ho,
Ming-Chieh Cheng:
Identify unrepairability to speed-up spare allocation for repairing memories.
IEEE Transactions on Reliability 54(2): 358-365 (2005) |
| 2000 |
|---|
| 6 | EE | Hsing-Chung Liang,
Chung-Len Lee:
Flip-Flop Selection for Mixed Scan and Reset Design Based on Test Generation and Structure of Sequential Circuits.
J. Inf. Sci. Eng. 16(5): 687-702 (2000) |
| 1999 |
|---|
| 5 | EE | Hsing-Chung Liang,
Chung-Len Lee:
An Effective Methodology for Mixed Scan and Reset Design Based on Test Generation and Structure of Sequential Circuits.
Asian Test Symposium 1999: 173-178 |
| 1998 |
|---|
| 4 | EE | Hsing-Chung Liang,
Chung-Len Lee,
Jwu E. Chen:
Partial Reset and Scan for Flip-Flops Based on States Requirement for Test Generation.
VTS 1998: 341-347 |
| 1997 |
|---|
| 3 | EE | Hsing-Chung Liang,
Chung-Len Lee,
Jwu E. Chen:
Identifying invalid states for sequential circuit test generation.
IEEE Trans. on CAD of Integrated Circuits and Systems 16(9): 1025-1033 (1997) |
| 1996 |
|---|
| 2 | EE | Hsing-Chung Liang,
Chung-Len Lee,
Jwu E. Chen:
Invalid State Identification for Sequential Circuit Test Generation.
Asian Test Symposium 1996: 10-15 |
| 1995 |
|---|
| 1 | EE | Hsing-Chung Liang,
Chung-Len Lee,
Jwu E. Chen:
Identifying Untestable Faults in Sequential Circuits.
IEEE Design & Test of Computers 12(3): 14-23 (1995) |
