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Beomsup Kim

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2005
15EEJaesang Lim, Yongchul Song, Jeong Pyo Kim, Beomsup Kim: An Efficient Software-Defined Radio Architecture for Multi-Mode WCDMA Applications. IEICE Transactions 88-A(12): 3677-3680 (2005)
14EEJaesang Lim, Jaejoon Kim, Beomsup Kim: Analysis and Design of Multistage Low-Phase-Noise CMOS LC-Ring Oscillators. IEICE Transactions 88-A(4): 1084-1089 (2005)
13EESeok Kang, Beomsup Kim: A DLL-Based Frequency Synthesizer with Selective Reuse of a Delay Cell Scheme for 2.4 GHz ISM Band. IEICE Transactions 88-C(1): 149-153 (2005)
2004
12EEYongchul Song, Beomsup Kim: Quadrature direct digital frequency synthesizers using interpolation-based angle rotation. IEEE Trans. VLSI Syst. 12(7): 701-710 (2004)
2003
11EEJae Hoon Shim, In-Cheol Park, Beomsup Kim: A hybrid delta-sigma modulator with adaptive calibration. ISCAS (1) 2003: 1025-1028
10EEHyung Ki Ahn, In-Cheol Park, Beomsup Kim: A 5-GHz self-calibrated I/Q clock generator using a quadrature LC-VCO. ISCAS (1) 2003: 797-800
2000
9 Beomsup Kim, Joonsuk Lee, Seung Hee Choi, Jun Mo Koo, Byung Jun Min: Non-Data-Aided Timing Recovery Algorithm for \pi/4-OPSK Modulated Signals. ICC (1) 2000: 392-396
1999
8EETae Hun Kim, Jeongsik Yang, Kyoo Hyun Lim, Jin Wook Kim, Jeong Eun Lee, Hyoung Sik Nam, Young Gon Kim, Jeong Pyo Kim, Sang Lin Byun, Bae Sung Kwon, Beomsup Kim: 16-bit DSP and System for Baseband / Voiceband Processing of IS-136 Cellular Telephony. ASP-DAC 1999: 49-
1998
7 Tae Hun Kim, Beomsup Kim: Dual-loop Digital PLL Design for Adaptive Clock Recovery. ASP-DAC 1998: 347-352
1997
6 Byungjin Chun, Seung Hee Choi, Beomsup Kim: A Digital Phase-Locked Loop with Variable Loop Gains Derived from RLS Method. ICC (1) 1997: 11-15
1995
5EEJeongsik Yang, Chanhong Park, Beomsup Kim: A digital audio signal processor for cellular phone application. ASP-DAC 1995
4 Byungjin Chun, Beomsup Kim, Yong Hong Lee: Adaptive Carrier Recovery Using Multi-Order DPLL for Mobile Communication Applications. ISCAS 1995: 1082-1085
1994
3 Todd C. Weigandt, Beomsup Kim, Paul R. Gray: Analysis of Timing Jitter in CMOS Ring Oscillators. ISCAS 1994: 27-30
2 Beomsup Kim, Todd C. Weigandt, Paul R. Gray: PLL/DLL System Noise Analysis for Low Jitter Clock Synthesizer Design. ISCAS 1994: 31-34
1993
1 Beomsup Kim: Optical MMSE gear-shifting algorithm for the fast synchronization of DPLL. ISCAS 1993: 172-175

Coauthor Index

1Hyung Ki Ahn [10]
2Sang Lin Byun [8]
3Seung Hee Choi [6] [9]
4Byungjin Chun [4] [6]
5Paul R. Gray [2] [3]
6Seok Kang [13]
7Jaejoon Kim [14]
8Jeong Pyo Kim [8] [15]
9Jin Wook Kim [8]
10Tae Hun Kim [7] [8]
11Young Gon Kim [8]
12Jun Mo Koo [9]
13Bae Sung Kwon [8]
14Jeong Eun Lee [8]
15Joonsuk Lee [9]
16Yong Hong Lee [4]
17Jaesang Lim [14] [15]
18Kyoo Hyun Lim [8]
19Byung Jun Min [9]
20Hyoung Sik Nam [8]
21Chanhong Park [5]
22In-Cheol Park [10] [11]
23Jae Hoon Shim [11]
24Yongchul Song [12] [15]
25Todd C. Weigandt [2] [3]
26Jeongsik Yang [5] [8]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)