2006 |
5 | EE | Ilias Pappas,
L. Nalpantidis,
Vasilios Kalenteridis,
Stilianos Siskos,
A. A. Hatzopoulos,
C. A. Dimitriadis:
A threshold voltage variation cancellation technique for analogue peripheral circuits of a display array using poly-Si TFTs.
ISCAS 2006 |
2005 |
4 | EE | Dimitrios Soudris,
Spiridon Nikolaidis,
Stilianos Siskos,
Konstantinos Tatas,
K. Siozios,
George Koutroumpezis,
Nikolaos Vassiliadis,
Vasilios Kalenteridis,
Haroula Pournara,
Ilias Pappas,
Adonios Thanailakis:
AMDREL: a novel low-energy FPGA architecture and supporting CAD tool design flow.
ASP-DAC 2005: 3-4 |
3 | EE | Kostas Siozios,
George Koutroumpezis,
Konstantinos Tatas,
Nikolaos Vassiliadis,
Vasilios Kalenteridis,
Haroula Pournara,
Ilias Pappas,
Dimitrios Soudris,
Antonios Thanailakis,
Spiridon Nikolaidis,
Stilianos Siskos:
A Novel FPGA Architecture and an Integrated Framework of CAD Tools for Implementing Applications.
IEICE Transactions 88-D(7): 1369-1380 (2005) |
2 | EE | Vasilios Kalenteridis,
Haroula Pournara,
K. Siozios,
Konstantinos Tatas,
Nikolaos Vassiliadis,
Ilias Pappas,
George Koutroumpezis,
Spiridon Nikolaidis,
Stilianos Siskos,
D. J. Soudris:
A complete platform and toolset for system implementation on fine-grain reconfigurable hardware.
Microprocessors and Microsystems 29(6): 247-259 (2005) |
2004 |
1 | EE | Vasilios Kalenteridis,
Haroula Pournara,
K. Siozios,
Konstantinos Tatas,
George Koutroumpezis,
Ilias Pappas,
Spiridon Nikolaidis,
Stilianos Siskos,
D. J. Soudris,
Adonios Thanailakis:
An Integrated FPGA Design Framework: Custom Designed FPGA Platform and Application Mapping Toolset Development.
IPDPS 2004 |