2008 |
20 | EE | Michael S. Hsiao,
Robert B. Jones:
Introduction to special section on high-level design, validation, and test.
ACM Trans. Design Autom. Electr. Syst. 13(1): (2008) |
2007 |
19 | EE | Sava Krstic,
Robert B. Jones,
John O'Leary:
Mothers of Pipelines.
Electr. Notes Theor. Comput. Sci. 174(8): 7-22 (2007) |
2006 |
18 | | Thomas Ball,
Robert B. Jones:
Computer Aided Verification, 18th International Conference, CAV 2006, Seattle, WA, USA, August 17-20, 2006, Proceedings
Springer 2006 |
2005 |
17 | EE | Carl-Johan H. Seger,
Robert B. Jones,
John W. O'Leary,
Thomas F. Melham,
Mark Aagaard,
Clark Barrett,
Don Syme:
An industrially effective environment for formal hardware verification.
IEEE Trans. on CAD of Integrated Circuits and Systems 24(9): 1381-1405 (2005) |
2004 |
16 | EE | Mark Aagaard,
Nancy A. Day,
Robert B. Jones:
Synchronization-at-Retirement for Pipeline Verification.
FMCAD 2004: 113-127 |
2003 |
15 | EE | Mark Aagaard,
Byron Cook,
Nancy A. Day,
Robert B. Jones:
A framework for superscalar microprocessor correctness statements.
STTT 4(3): 298-312 (2003) |
2002 |
14 | EE | Thomas F. Melham,
Robert B. Jones:
Abstraction by Symbolic Indexing Transformations.
FMCAD 2002: 1-18 |
13 | | Robert B. Jones,
Jens U. Skakkebæk,
David L. Dill:
Formal Verification of Out-of-Order Execution with Incremental Flushing.
Formal Methods in System Design 20(2): 139-158 (2002) |
2001 |
12 | EE | Mark Aagaard,
Byron Cook,
Nancy A. Day,
Robert B. Jones:
A Framework for Microprocessor Correctness Statements.
CHARME 2001: 433-448 |
11 | EE | Robert B. Jones,
John W. O'Leary,
Carl-Johan H. Seger,
Mark Aagaard,
Thomas F. Melham:
Practical Formal Verification in Microprocessor Design.
IEEE Design & Test of Computers 18(4): 16-25 (2001) |
2000 |
10 | EE | Mark Aagaard,
Robert B. Jones,
Roope Kaivola,
Katherine R. Kohatsu,
Carl-Johan H. Seger:
Formal verification of iterative algorithms in microprocessors.
DAC 2000: 201-206 |
9 | EE | Mark Aagaard,
Robert B. Jones,
Thomas F. Melham,
John W. O'Leary,
Carl-Johan H. Seger:
A Methodology for Large-Scale Hardware Verification.
FMCAD 2000: 263-282 |
1999 |
8 | EE | Mark Aagaard,
Robert B. Jones,
Carl-Johan H. Seger:
Parametric Representations of Boolean Constraints.
DAC 1999: 402-407 |
7 | EE | Mark Aagaard,
Robert B. Jones,
Carl-Johan H. Seger:
Lifted-FL: A Pragmatic Implementation of Combined Model Checking and Theorem Proving.
TPHOLs 1999: 323-340 |
1998 |
6 | | Jens U. Skakkebæk,
Robert B. Jones,
David L. Dill:
Formal Verification of Out-of-Order Execution Using Incremental Flushing.
CAV 1998: 98-109 |
5 | EE | Mark Aagaard,
Robert B. Jones,
Carl-Johan H. Seger:
Combining Theorem Proving and Trajectory Evaluation in an Industrial Environment.
DAC 1998: 538-541 |
4 | EE | Robert B. Jones,
Jens U. Skakkebæk,
David L. Dill:
Reducing Manual Abstraction in Formal Verification of Out-of-Order Execution.
FMCAD 1998: 2-17 |
1996 |
3 | | Robert B. Jones,
Carl-Johan H. Seger,
David L. Dill:
Self-Consistency Checking.
FMCAD 1996: 159-171 |
1995 |
2 | EE | Robert B. Jones,
David L. Dill,
Jerry R. Burch:
Efficient validity checking for processor verification.
ICCAD 1995: 2-6 |
1991 |
1 | | T. R. Girill,
Thomas D. Griffin,
Robert B. Jones:
Extended subject access to hypertext online documentation, Parts I and II: The search-support and maintenance problems.
JASIS 42(6): 414-426 (1991) |