| 2008 |
|---|
| 7 | EE | Hailin Jiang,
Malgorzata Marek-Sadowska:
Power gating scheduling for power/ground noise reduction.
DAC 2008: 980-985 |
| 2007 |
|---|
| 6 | EE | Hailin Jiang,
Malgorzata Marek-Sadowska:
Power-Gating Aware Floorplanning.
ISQED 2007: 853-860 |
| 2006 |
|---|
| 5 | EE | Hailin Jiang,
Malgorzata Marek-Sadowska:
Power/ground supply network optimization for power-gating.
ICCD 2006 |
| 2005 |
|---|
| 4 | EE | Hailin Jiang,
Kai Wang,
Malgorzata Marek-Sadowska:
Clock skew bounds estimation under power supply and process variations.
ACM Great Lakes Symposium on VLSI 2005: 332-336 |
| 3 | EE | Hailin Jiang,
Malgorzata Marek-Sadowska,
Sani R. Nassif:
Benefits and Costs of Power-Gating Technique.
ICCD 2005: 559-566 |
| 2 | EE | Kai Wang,
Yajun Ran,
Hailin Jiang,
Malgorzata Marek-Sadowska:
General skew constrained clock network sizing based on sequential linear programming.
IEEE Trans. on CAD of Integrated Circuits and Systems 24(5): 773-782 (2005) |
| 2003 |
|---|
| 1 | EE | Bo Hu,
Hailin Jiang,
Qinghua Liu,
Malgorzata Marek-Sadowska:
Synthesis and placement flow for gain-based programmable regular fabrics.
ISPD 2003: 197-203 |
