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Clemens Heitzinger

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2006
9EEW. Wessner, J. Cervenka, Clemens Heitzinger, Andreas Hössinger, Siegfried Selberherr: Anisotropic Mesh Refinement for the Simulation of Three-Dimensional Semiconductor Manufacturing Processes. IEEE Trans. on CAD of Integrated Circuits and Systems 25(10): 2129-2139 (2006)
2005
8EEClemens Heitzinger, Alireza Sheikholeslami, Jong Mun Park, Siegfried Selberherr: A method for generating structurally aligned grids for semiconductor device simulation. IEEE Trans. on CAD of Integrated Circuits and Systems 24(10): 1485-1491 (2005)
2004
7EEThomas Binder, Clemens Heitzinger, Siegfried Selberherr: A study on global and local optimization techniques for TCAD analysis tasks. IEEE Trans. on CAD of Integrated Circuits and Systems 23(6): 814-822 (2004)
6EEClemens Heitzinger, Andreas Hössinger, Siegfried Selberherr: An algorithm for smoothing three-dimensional Monte Carlo ion implantation simulation results. Mathematics and Computers in Simulation 66(2-3): 219-230 (2004)
5EEStefan Holzer, Rainer Minixhofer, Clemens Heitzinger, Johannes Fellner, Tibor Grasser, Siegfried Selberherr: Extraction of material parameters based on inverse modeling of three-dimensional interconnect fusing structures. Microelectronics Journal 35(10): 805-810 (2004)
4EEClemens Heitzinger, Siegfried Selberherr: On the simulation of the formation and dissolution of silicon self-interstitial clusters and the corresponding inverse modeling problem. Microelectronics Journal 35(2): 167-171 (2004)
2003
3EEClemens Heitzinger, Wolfgang Pyka, Naoki Tamaoki, Toshiro Takase, Toshimitsu Ohmine, Siegfried Selberherr: Simulation of arsenic in situ doping with polysilicon CVD and its application to high aspect ratio trenches. IEEE Trans. on CAD of Integrated Circuits and Systems 22(3): 285-292 (2003)
2EEClemens Heitzinger, Andreas Hössinger, Siegfried Selberherr: On smoothing three-dimensional Monte Carlo ion implantation simulation results. IEEE Trans. on CAD of Integrated Circuits and Systems 22(7): 879-883 (2003)
2002
1 Clemens Heitzinger, Siegfried Selberherr: On the Topography Simulation of Memory Cell Trenches for Semiconductor Manufacturing Deposition Processes using the Level Set Method. ESM 2002: 653-660

Coauthor Index

1Thomas Binder [7]
2J. Cervenka [9]
3Johannes Fellner [5]
4Tibor Grasser [5]
5Stefan Holzer [5]
6Andreas Hössinger [2] [6] [9]
7Rainer Minixhofer [5]
8Toshimitsu Ohmine [3]
9Jong Mun Park [8]
10Wolfgang Pyka [3]
11Siegfried Selberherr [1] [2] [3] [4] [5] [6] [7] [8] [9]
12Alireza Sheikholeslami [8]
13Toshiro Takase [3]
14Naoki Tamaoki [3]
15W. Wessner [9]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)