| 2008 |
|---|
| 5 | EE | Yu Wang,
Ku He,
Rong Luo,
Hui Wang,
Huazhong Yang:
Two-Phase Fine-Grain Sleep Transistor Insertion Technique in Leakage Critical Circuits.
IEEE Trans. VLSI Syst. 16(9): 1101-1113 (2008) |
| 2007 |
|---|
| 4 | EE | Yu Wang,
Hong Luo,
Ku He,
Rong Luo,
Huazhong Yang,
Yuan Xie:
Temperature-aware NBTI modeling and the impact of input vector control on performance degradation.
DATE 2007: 546-551 |
| 3 | EE | Ku He,
Rong Luo,
Yu Wang:
A power gating scheme for ground bounce reduction during mode transition.
ICCD 2007: 388-394 |
| 2 | EE | Hong Luo,
Yu Wang,
Ku He,
Rong Luo,
Huazhong Yang,
Yuan Xie:
Modeling of PMOS NBTI Effect Considering Temperature Variation.
ISQED 2007: 139-144 |
| 1 | EE | Hong Luo,
Yu Wang,
Ku He,
Rong Luo,
Huazhong Yang,
Yuan Xie:
A Novel Gate-Level NBTI Delay Degradation Model with Stacking Effect.
PATMOS 2007: 160-170 |
