M. Anwarul Hasan
List of publications from the
2008 |
57 | EE | M. Anwar Hasan,
Christophe Negre:
Subquadratic Space Complexity Multiplication over Binary Fields with Dickson Polynomial Representation.
WAIFI 2008: 88-102 |
2007 |
56 | EE | Siavash Bayat Sarmadi,
M. Anwar Hasan:
Run-Time Error Detection in Polynomial Basis Multiplication Using Linear Codes.
ASAP 2007: 204-209 |
55 | EE | Siavash Bayat Sarmadi,
M. Anwar Hasan:
Detecting errors in a polynomial basis multiplier using multiple parity bits for both inputs.
ICCD 2007: 368-375 |
54 | EE | Jaewook Chung,
M. Anwar Hasan:
Asymmetric Squaring Formulae.
IEEE Symposium on Computer Arithmetic 2007: 113-122 |
53 | EE | Jaewook Chung,
M. Anwar Hasan:
Montgomery Reduction Algorithm for Modular Multiplication Using Low-Weight Polynomial Form Integers.
IEEE Symposium on Computer Arithmetic 2007: 230-239 |
52 | EE | Nevine Maurice Ebeid,
M. Anwar Hasan:
On binary signed digit representations of integers.
Des. Codes Cryptography 42(1): 43-65 (2007) |
51 | EE | Nevine Maurice Ebeid,
M. Anwar Hasan:
On tau-adic representations of integers.
Des. Codes Cryptography 45(3): 271-296 (2007) |
50 | EE | Jaewook Chung,
M. Anwar Hasan:
Low-Weight Polynomial Form Integers for Efficient Modular Multiplication.
IEEE Trans. Computers 56(1): 44-57 (2007) |
49 | EE | Haining Fan,
M. Anwar Hasan:
Subquadratic Computational Complexity Schemes for Extended Binary Field Multiplication Using Optimal Normal Bases.
IEEE Trans. Computers 56(10): 1435-1437 (2007) |
48 | EE | Haining Fan,
M. Anwar Hasan:
A New Approach to Subquadratic Space Complexity Parallel Multipliers for Extended Binary Fields.
IEEE Trans. Computers 56(2): 224-233 (2007) |
47 | EE | Haining Fan,
M. Anwar Hasan:
Comments on "Five, Six, and Seven-Term Karatsuba-Like Formulae'.
IEEE Trans. Computers 56(5): 716-717 (2007) |
46 | EE | Siavash Bayat Sarmadi,
M. Anwar Hasan:
On Concurrent Detection of Errors in Polynomial Basis Multiplication.
IEEE Trans. VLSI Syst. 15(4): 413-426 (2007) |
2006 |
45 | EE | Arash Reyhani-Masoleh,
M. Anwar Hasan:
Fault Detection Architectures for Field Multiplication Using Polynomial Bases.
IEEE Trans. Computers 55(9): 1089-1103 (2006) |
44 | EE | Haining Fan,
M. Anwar Hasan:
Relationship between GF(2m) Montgomery and Shifted Polynomial Basis Multiplication Algorithms.
IEEE Trans. Computers 55(9): 1202-1206 (2006) |
2005 |
43 | EE | Siavash Bayat Sarmadi,
M. Anwar Hasan:
Concurrent Error Detection of Polynomial Basis Multiplication over Extension Fields using a Multiple-bit Parity Scheme.
DFT 2005: 102-110 |
42 | EE | Arash Reyhani-Masoleh,
M. Anwar Hasan:
Low Complexity Word-Level Sequential Normal Basis Multipliers.
IEEE Trans. Computers 54(2): 98-110 (2005) |
41 | EE | Amir K. Daneshbeh,
M. Anwarul Hasan:
A Class of Unidirectional Bit Serial Systolic Architectures for Multiplicative Inversion and Division over GF(2m).
IEEE Trans. Computers 54(3): 370-380 (2005) |
2004 |
40 | | Helena Handschuh,
M. Anwar Hasan:
Selected Areas in Cryptography, 11th International Workshop, SAC 2004, Waterloo, Canada, August 9-10, 2004, Revised Selected Papers
Springer 2004 |
39 | EE | Jonathan Lutz,
M. Anwarul Hasan:
High Performance FPGA based Elliptic Curve Cryptographic Co-Processor.
ITCC (2) 2004: 486-492 |
38 | EE | Amir K. Daneshbeh,
M. Anwarul Hasan:
Area Efficient High Speed Elliptic Curve Cryptoprocessor for Random Curves.
ITCC (2) 2004: 588- |
37 | EE | Arash Reyhani-Masoleh,
M. Anwar Hasan:
Efficient digit-serial normal basis multipliers over binary extension fields.
ACM Trans. Embedded Comput. Syst. 3(3): 575-592 (2004) |
36 | EE | Arash Reyhani-Masoleh,
M. Anwar Hasan:
Towards fault-tolerant cryptographic computations over finite fields.
ACM Trans. Embedded Comput. Syst. 3(3): 593-613 (2004) |
35 | EE | Arash Reyhani-Masoleh,
M. Anwar Hasan:
Low Complexity Bit Parallel Architectures for Polynomial Basis Multiplication over GF(2^{m}).
IEEE Trans. Computers 53(8): 945-959 (2004) |
2003 |
34 | EE | Arash Reyhani-Masoleh,
M. Anwarul Hasan:
On Low Complexity Bit Parallel Polynomial Basis Multipliers.
CHES 2003: 189-202 |
33 | EE | Amir K. Daneshbeh,
M. Anwarul Hasan:
A Unidirectional Bit Serial Systolic Architecture for Double-Basis Division over GF(2m).
IEEE Symposium on Computer Arithmetic 2003: 174-180 |
32 | EE | Arash Reyhani-Masoleh,
M. Anwarul Hasan:
Low Complexity Sequential Normal Basis Multipliers over GF(2m).
IEEE Symposium on Computer Arithmetic 2003: 188-195 |
31 | EE | Jaewook Chung,
M. Anwar Hasan:
More Generalized Mersenne Numbers: (Extended Abstract).
Selected Areas in Cryptography 2003: 335-347 |
30 | EE | Nevine Maurice Ebeid,
M. Anwar Hasan:
On Randomizing Private Keys to Counteract DPA Attacks.
Selected Areas in Cryptography 2003: 58-72 |
29 | EE | Arash Reyhani-Masoleh,
M. Anwarul Hasan:
Fast Normal Basis Multiplication Using General Purpose Processors.
IEEE Trans. Computers 52(11): 1379-1390 (2003) |
28 | EE | Arash Reyhani-Masoleh,
M. Anwarul Hasan:
Efficient Multiplication Beyond Optimal Normal Bases.
IEEE Trans. Computers 52(4): 428-439 (2003) |
2002 |
27 | EE | Arash Reyhani-Masoleh,
M. Anwarul Hasan:
Error Detection in Polynomial Basis Multipliers over Binary Extension Fields.
CHES 2002: 515-528 |
26 | EE | Arash Reyhani-Masoleh,
M. Anwar Hasan:
Efficient digit-serial normal basis multipliers over GF(2/sup m/).
ISCAS (5) 2002: 781-784 |
25 | EE | Huapeng Wu,
M. Anwarul Hasan,
Ian F. Blake,
Shuhong Gao:
Finite Field Multiplier Using Redundant Representation.
IEEE Trans. Computers 51(11): 1306-1316 (2002) |
24 | EE | Arash Reyhani-Masoleh,
M. Anwarul Hasan:
A New Construction of Massey-Omura Parallel Multiplier over GF(2m).
IEEE Trans. Computers 51(5): 511-520 (2002) |
2001 |
23 | EE | M. Anwarul Hasan:
Efficient Computation of Multiplicative Inverses for Cryptographic Applications.
IEEE Symposium on Computer Arithmetic 2001: 66-72 |
22 | EE | Arash Reyhani-Masoleh,
M. Anwarul Hasan:
Fast Normal Basis Multiplication Using General Purpose Processors.
Selected Areas in Cryptography 2001: 230-244 |
21 | EE | M. Anwarul Hasan:
Power Analysis Attacks and Algorithmic Approaches to Their Countermeasures for Koblitz Curve Cryptosystems.
IEEE Trans. Computers 50(10): 1071-1083 (2001) |
20 | EE | Huapeng Wu,
M. Anwar Hasan:
Efficient exponentiation using weakly dual basis.
IEEE Trans. VLSI Syst. 9(6): 874-879 (2001) |
19 | EE | Amr G. Wassal,
M. Anwar Hasan:
Low-power system-level design of VLSI packet switching fabrics.
IEEE Trans. on CAD of Integrated Circuits and Systems 20(6): 723-738 (2001) |
2000 |
18 | EE | M. Anwarul Hasan:
Power Analysis Attacks and Algorithmic Approaches to their Countermeasures for Koblitz Curve Cryptosystems.
CHES 2000: 93-108 |
17 | EE | Arash Reyhani-Masoleh,
M. Anwarul Hasan:
On Efficient Normal Basis Multiplication.
INDOCRYPT 2000: 213-224 |
16 | EE | M. Anwarul Hasan,
Amr G. Wassal:
VLSI Algorithms, Architectures, and Implementation of a Versatile GF(2m) Processor.
IEEE Trans. Computers 49(10): 1064-1073 (2000) |
15 | EE | M. Anwarul Hasan:
Look-Up Table-Based Large Finite Field Multiplication in Memory Constrained Cryptosystems.
IEEE Trans. Computers 49(7): 749-758 (2000) |
1999 |
14 | EE | Huapeng Wu,
M. Anwarul Hasan,
Ian F. Blake:
Highly Regular Architectures for Finite Field Computation Using Redundant Basis.
CHES 1999: 269-279 |
13 | EE | Amr G. Wassal,
M. Anwarul Hasan:
A VLSI Architecture for ATM Algorithm-Agile Encryption.
Great Lakes Symposium on VLSI 1999: 325- |
12 | EE | M. Anwarul Hasan:
Look-Up Table Based Large Finite Field Multiplication in Memory Constrained Cryptosystems.
IMA Int. Conf. 1999: 213-221 |
11 | | Huapeng Wu,
M. Anwarul Hasan:
Closed-Form Expression for the Average Weight of Signed-Digit Representations.
IEEE Trans. Computers 48(8): 848-851 (1999) |
1998 |
10 | EE | Amr G. Wassal,
M. Anwarul Hasan,
Mohamed I. Elmasry:
Low-Power Design of Finite Field Multipliers for Wireless Applications.
Great Lakes Symposium on VLSI 1998: 19-25 |
9 | | Huapeng Wu,
M. Anwarul Hasan,
Ian F. Blake:
New Low-Complexity Bit-Parallel Finite Field Multipliers Using Weakly Dual Bases.
IEEE Trans. Computers 47(11): 1223-1234 (1998) |
8 | | Huapeng Wu,
M. Anwarul Hasan:
Low Complexity Bit-Parallel Multipliers for a Class of Finite Fields.
IEEE Trans. Computers 47(8): 883-887 (1998) |
7 | | M. Anwarul Hasan:
Double-Basis Multiplicative Inversion Over GF(2m).
IEEE Trans. Computers 47(9): 960-970 (1998) |
1997 |
6 | | Huapeng Wu,
M. Anwarul Hasan:
Efficient Exponentiation of a Primitive Root in GF(2^m).
IEEE Trans. Computers 46(2): 162-172 (1997) |
5 | | M. Anwarul Hasan:
Division-and-Accumulation over GF(2''').
IEEE Trans. Computers 46(6): 705-708 (1997) |
1995 |
4 | | M. Anwarul Hasan,
Vijay K. Bhargava:
Architecture for a Low Complexity Rate-Adaptive Reed-Solomon Encoder.
IEEE Trans. Computers 44(7): 938-942 (1995) |
1993 |
3 | | M. Anwarul Hasan,
Muzhong Wang,
Vijay K. Bhargava:
A Modified Massey-Omura Parallel Multiplier for a Class of Finite Fields.
IEEE Trans. Computers 42(10): 1278-1280 (1993) |
1992 |
2 | | M. Anwarul Hasan,
Muzhong Wang,
Vijay K. Bhargava:
Modular Construction of Low Complexity Parallel Multipliers for a Class of Finite Fields GF(2^m).
IEEE Trans. Computers 41(8): 962-971 (1992) |
1 | | M. Anwarul Hasan,
Vijay K. Bhargava:
Bit-Serial Systolic Divider and Multiplier for Finite Fields GF(2^m).
IEEE Trans. Computers 41(8): 972-980 (1992) |