| 1997 |
|---|
| 5 | EE | Eric Lehman,
Yosinatori Watanabe,
Joel Grodstein,
Heather Harkness:
Logic decomposition during technology mapping.
IEEE Trans. on CAD of Integrated Circuits and Systems 16(8): 813-834 (1997) |
| 1995 |
|---|
| 4 | EE | Eric Lehman,
Yosinori Watanabe,
Joel Grodstein,
Heather Harkness:
Logic decomposition during technology mapping.
ICCAD 1995: 264-271 |
| 3 | EE | Joel Grodstein,
Eric Lehman,
Heather Harkness,
Bill Grundmann,
Yosinatori Watanabe:
A delay model for logic synthesis of continuously-sized networks.
ICCAD 1995: 458-462 |
| 1994 |
|---|
| 2 | EE | Alexander Saldanha,
Heather Harkness,
Patrick C. McGeer,
Robert K. Brayton,
Alberto L. Sangiovanni-Vincentelli:
Performance Optimization Using Exact Sensitization.
DAC 1994: 425-429 |
| 1 | EE | Joel Grodstein,
Eric Lehman,
Heather Harkness,
Hervé J. Touati,
Bill Grundmann:
Optimal latch mapping and retiming within a tree.
ICCAD 1994: 242-245 |
