| |
| 1997 | ||
|---|---|---|
| 2 | EE | Eric Lehman, Yosinatori Watanabe, Joel Grodstein, Heather Harkness: Logic decomposition during technology mapping. IEEE Trans. on CAD of Integrated Circuits and Systems 16(8): 813-834 (1997) |
| 1995 | ||
| 1 | EE | Joel Grodstein, Eric Lehman, Heather Harkness, Bill Grundmann, Yosinatori Watanabe: A delay model for logic synthesis of continuously-sized networks. ICCAD 1995: 458-462 |
| 1 | Joel Grodstein | [1] [2] |
| 2 | Bill Grundmann | [1] |
| 3 | Heather Harkness | [1] [2] |
| 4 | Eric Lehman | [1] [2] |