| 2000 |
|---|
| 4 | EE | Karthikeyan Madathil,
Jagdish C. Rao,
Subash G. Chandar,
Amitabh Menon,
Avinash K. Gautam,
Amit M. Brahme,
H. Udayakumar:
A Framework for Cost vs. Performance Tradeoffs in the Design of Digital Signal Processor Cores.
VLSI Design 2000: 468- |
| 1999 |
|---|
| 3 | EE | Avinash K. Gautam,
V. Visvanathan,
S. K. Nandy:
Automatic Generation of Tree Multipliers Using Placement-Driven Netlists.
ICCD 1999: 285-288 |
| 2 | EE | Avinash K. Gautam,
Jagdish C. Rao,
Karthikeyan Madathil,
Vilesh Shah,
H. Udayakumar,
Amitabh Menon,
Subash G. Chandar:
A Design Methodology for a Fully Synthesized High Speed DSP Core in a Deep Sub-Micron Technology.
ICCD 1999: 340-347 |
| 1 | EE | Avinash K. Gautam,
Jagdish C. Rao,
Rohit Rathi,
H. Udayakumar:
A Design-in Methodology to Ensure First Time Success of Complex Digital Signal Processors.
VLSI Design 1999: 346-349 |
