| 2006 |
|---|
| 9 | EE | Hadi Esmaeilzadeh,
A. Moghimi,
E. Ebrahimi,
Caro Lucas,
Zainalabedin Navabi,
A. M. Fakhraie:
DCim++: a C++ library for object oriented hardware design and distributed simulation.
ISCAS 2006 |
| 8 | EE | Hadi Esmaeilzadeh,
Pooya Saeedi,
Babak Nadjar Araabi,
Caro Lucas,
Seid Mehdi Fakhraie:
Neural network stream processing core (NnSP) for embedded systems.
ISCAS 2006 |
| 7 | EE | Saeed Safari,
Amir-Hossein Jahangir,
Hadi Esmaeilzadeh:
A parameterized graph-based framework for high-level test synthesis.
Integration 39(4): 363-381 (2006) |
| 2005 |
|---|
| 6 | EE | Hadi Esmaeilzadeh,
Saeed Shamshiri,
Pooya Saeedi,
Zainalabedin Navabi:
ISC: Reconfigurable Scan-Cell Architecture for Low Power Testing.
Asian Test Symposium 2005: 236-241 |
| 5 | EE | Saeed Shamshiri,
Hadi Esmaeilzadeh,
Zainalabedin Navabi:
Instruction-level test methodology for CPU core self-testing.
ACM Trans. Design Autom. Electr. Syst. 10(4): 673-689 (2005) |
| 2004 |
|---|
| 4 | EE | Saeed Shamshiri,
Hadi Esmaeilzadeh,
Zainalabedin Navabi:
Test Instruction Set (TIS) for High Level Self-Testing of CPU Cores.
Asian Test Symposium 2004: 158-163 |
| 3 | | Neda Shahidi,
Hadi Esmaeilzadeh,
Marziye Abdollahi,
Caro Lucas:
Memetic Algorithm Based Path Planning for a Mobile Robot.
International Conference on Computational Intelligence 2004: 56-59 |
| 2003 |
|---|
| 2 | EE | Saeed Safari,
Hadi Esmaeilzadeh,
Amir-Hossein Jahangir:
Testability Improvement During High-Level Synthesis.
Asian Test Symposium 2003: 505 |
| 1 | EE | Saeed Safari,
Hadi Esmaeilzadeh,
Amir-Hossein Jahangir:
A novel improvement technique for high-level test synthesis.
ISCAS (5) 2003: 609-612 |
