| 1996 |
|---|
| 7 | EE | T. Raju Damarla,
Moon J. Chung,
Wei Su,
Gerald T. Michael:
Faulty chip identification in a multi chip module system.
VTS 1996: 254-259 |
| 1995 |
|---|
| 6 | EE | T. Raju Damarla,
Wei Su,
Gerald T. Michael,
Moon J. Chung,
Charles E. Stroud:
A built-in self test scheme for VLSI.
ASP-DAC 1995 |
| 5 | EE | Charles E. Stroud,
T. Raju Damarla:
Improving the efficiency of error identification via signature analysis.
VTS 1995: 244-249 |
| 4 | EE | T. Raju Damarla,
Charles E. Stroud,
Avinash Sathaye:
Multiple error detection and identification via signature analysis.
J. Electronic Testing 7(3): 193-207 (1995) |
| 1991 |
|---|
| 3 | | T. Raju Damarla,
Fiaz Hossain:
Spectral Techniques for Multiple-Valued Logic Circuits.
ISMVL 1991: 340-346 |
| 1990 |
|---|
| 2 | | T. Raju Damarla:
Fault Detection in Multiple Valued Logic Circuits.
ISMVL 1990: 69-74 |
| 1989 |
|---|
| 1 | | T. Raju Damarla,
Mark G. Karpovsky:
Fault Detection in Combinational Networks by Reed-Muller Transforms.
IEEE Trans. Computers 38(6): 788-797 (1989) |
